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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320C6472ECTZ датащи(PDF) 112 Page - Texas Instruments |
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TMS320C6472ECTZ датащи(HTML) 112 Page - Texas Instruments |
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112 / 269 page  TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com Table 5-13. Megamodule L1/L2 Memory Protection Registers (continued) HEX ADDRESS RANGE ACRONYM REGISTER NAME L1D Memory Protection Page Attribute Register 27 0184 AE6C L1DMPPA27 00F0 5800 - 00F0 5FFF L1D Memory Protection Page Attribute Register 28 0184 AE70 L1DMPPA28 00F0 6000 - 00F0 67FF L1D Memory Protection Page Attribute Register 29 0184 AE74 L1DMPPA29 00F0 6800 - 00F0 6FFF L1D Memory Protection Page Attribute Register 30 0184 AE78 L1DMPPA30 00F0 7000 - 00F0 77FF L1D Memory Protection Page Attribute Register 31 0184 AE7C L1DMPPA31 00F0 7800 - 00F0 7FFF 0184 AE80 - 0185 FFFF - Reserved Table 5-14. CPU Megamodule Bandwidth Management Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 0182 0200 EMCCPUARBE EMC CPU Arbitration Control Register 0182 0204 EMCIDMAARBE EMC IDMA Arbitration Control Register 0182 0208 EMCSDMAARBE EMC Slave DMA Arbitration Control Register 0182 020C EMCMDMAARBE EMC Master DMA Arbitration Control Resgiter 0182 0210 - 0182 02FC - Reserved 0184 1000 L2DCPUARBU L2D CPU Arbitration Control Register 0184 1004 L2DIDMAARBU L2D IDMA Arbitration Control Register 0184 1008 L2DSDMAARBU L2D Slave DMA Arbitration Control Register 0184 100C L2DUCARBU L2D User Coherence Arbitration Control Resgiter 0184 1010 - 0184 103C - Reserved 0184 1040 L1DCPUARBD L1D CPU Arbitration Control Register 0184 1044 L1DIDMAARBD L1D IDMA Arbitration Control Register 0184 1048 L1DSDMAARBD L1D Slave DMA Arbitration Control Register 0184 104C L1DUCARBD L1D User Coherence Arbitration Control Resgiter 5.8 CPU Revision ID Each 64x+ Megamodule contains a 64x+ CPU processing core. This 64x+ CPU processing core also contains an additional CPU ID and Revision ID independent from the Megamodule Revision ID. It is contained in the control status resister (CSR) which is part of the control register file within the CPU core. The CPU ID field (bits 31:24) identifies the CPU core as 64x+ by returning the value 10h when read. The REVISION ID field (bits 23:16) returns the value 00h when read. For more CPU Revision ID related information, see the TMS320C6472 Digital Signal Processor Silicon Errata (literature number SPRZ300). For more CPU CSR related information, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732). 112 C64x+ Megamodule Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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