TMS320C6472ECTZ datasheet(35/269 Pages) TI1

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TMS320C6472

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SPRS612G

– JUNE 2009 – REVISED JULY 2011

Table 2-5. Terminal Functions (continued)

SIGNAL

TYPE(1)

IPD/IPU(2) (3)

DESCRIPTION

NAME

NO.

EMAC Receive Data 6 (MRXD6) for GMII0 or Receive Error

MRXD06/RMRXER1

AJ13

IPU

(RXER) for RMII1. Pin function defined by MACSEL0[2:0] and

MACSEL1[1:0] (see Table 3-1).

EMAC Receive Data 7 (MRXD7) for GMII0. Pin function defined

MRXD07

AJ6

IPU

by MACSEL0[2:0] (see Table 3-1).

EMAC Receive Clock (MRCLK) for MII0 [default] and GMII0 or

MRCLK0/SRXCLK1

AG10

IPU

Receive Clock (RXCLK) for S3MII1. Pin function defined by

MACSEL0[2:0] and MACSEL1[1:0] (see Table 3-1).

EMAC Receive Data Valid (MRDV) for MII0 [default] and GMII0 or

Receive Carrier Sense/Data Valid (CRSDV) for S3MII1. Pin

MRXDV0/RMCRSDV1

AE12

IPU

function defined by MACSEL0[2:0] and MACSEL1[1:0] (see

Table 3-1).

EMAC Receive Error (MRXER) for MII0 [default], GMII0 and

MRXER0/RMRXER0/SRXCLK0

AF12

IPU

RMII0 or Receive Clock (RXCLK) for S3MII0. Pin function defined

by MACSEL0[2:0] (see Table 3-1).

EMAC Receive Carrier Sense (MCRS) for MII0 [default] and

MCRS0/RMCRSDV0

AF10

IPD

GMII0 or Receive Carrier Sense/Data Valid (CRSDV) for RMII0.

Pin function defined by MACSEL0[2:0] (see Table 3-1).

EMAC Transmit Clock output (GMTCLK) for GMII0 or Reference

GMTCLK0/REFCLK1/SREFCLK1

AG6

I/O

IPU

clock input (REFCLK) for RMII1 and S3MII1. Pin function defined

by MACSEL0[2:0] and MACSEL1[1:0] (see Table 3-1).

EMAC Transmit Clock input (MTCLK) for MII0 [default] and GMII0

MTCLK0/REFCLK0/SREFCLK0

AJ9

IPU

or Reference clock input (REFCLK) for RMII0 and S3MII0. Pin

function defined by MACSEL0[2:0] (see Table 3-1).

EMAC Transmit Data 0 (MTXD0) for MII0 [default], GMII0 and

MTXD00/RMTXD00/STXD0

AF8

IPU

RMII0 or Transmit Data (TXD) for S3MII0. Pin function defined by

MACSEL0[2:0] (see Table 3-1).

EMAC Transmit Data 1 (MTXD1) for MII0 [default], GMII0 and

MTXD01/RMTXD01/STXSYNC0

AH7

IPU

RMII0 or Transmit Sync (TXSYNC) for S3MII0. Pin function

defined by MACSEL0[2:0] (see Table 3-1).

EMAC Transmit Data 2 (MTXD2) for MII0 [default] and GMII0 or

MTXD02/STXD1

AG8

IPU

Transmit Data (TXD) for S3MII1. Pin function defined by

MACSEL0[2:0] and MACSEL1[1:0] (see Table 3-1).

EMAC Transmit Data 3 (MTXD3) for MII0 [default] and GMII0 or

MTXD03/STXSYNC1

AF9

IPU

Transmit Sync (TXSYNC) for S3MII1. Pin function defined by

MACSEL0[2:0] and MACSEL1[1:0] (see Table 3-1).

EMAC Transmit Data 4 (MTXD4) for GMII0 or Transmit Data 0

(TXD0) for RMII1 or Transmit Clock (TXCLK) for S3MII1. Pin

MTXD04/RMTXD10/STXCLK1

AE7

IPU

function defined by MACSEL0[2:0] and MACSEL1[1:0] (see

Table 3-1).

EMAC Transmit Data 5 (MTXD5) for GMII0 or Transmit Data 1

MTXD05/RMTXD11

AJ7

IPU

(TXD1) for RMII1. Pin function defined by MACSEL0[2:0] and

MACSEL1[1:0] (see Table 3-1).

EMAC Transmit Data 6 (MTXD6) for GMII0 or Transmit Enable

MTXD06/RMTXEN1

AE11

IPU

(TXEN) for RMII1. Pin function defined by MACSEL0[2:0] and

MACSEL1[1:0] (see Table 3-1).

EMAC Transmit Data 7 (MTXD7) for GMII0 or Transmit Clock

MTXD07/STXCLK0

AG11

IPU

(TXCLK) for S3MII0. Pin function defined by MACSEL0[2:0] (see

Table 3-1).

EMAC Transmit Enable (MTXEN) for MII0 [default], GMII0 and

MTXEN0/RMTXEN0

AF11

IPU

RMII0. Pin function defined by MACSEL0[2:0] (see Table 3-1).

EMAC Collision (MCOL) for MII0 [default]. Pin function defined by

MCOL0

AE8

IPD

MACSEL0[2:0] (see Table 3-1).

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