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TMS320C6472ECTZ датащи(PDF) 85 Page - Texas Instruments |
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TMS320C6472ECTZ датащи(HTML) 85 Page - Texas Instruments |
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85 / 269 page ![]() TMS320C6472 www.ti.com SPRS612G – JUNE 2009 – REVISED JULY 2011 3.9 Reset and Boot Registers 3.9.1 Reset Status Register (RESET_STAT) The reset status register (RESET_STAT) indicates the status of global (device) reset and of the local reset for all six C64x+ megamodules. 31 30 16 GR Reserved RC-0 R-000 0000 0000 0000 15 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved LR5 LR4 LR3 LR2 LR1 LR0 R-00 0000 0000 0000 RC-10 RC-10 RC-10 RC-10 RC-10 RC-10 LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset Figure 3-15. Reset Status Register (RESET_STAT) Table 3-20. Reset Status Register (RESET_STAT) Field Descriptions Bit Field Value Description 31 GR 1 Global Reset. Writing a 1 to GR clears the bit, writing a 0 has no effect. 30:12 Reserved Reserved 11:10 LR5 Local Reset 5. Writing a 1 to LR5 clears the bit; writing a 0 has no effect. 00 Core 5 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 5. 10 Reserved 11 Core 5 has responded with lreset_out. 9:8 LR4 Local Reset 4. Writing a 1 to LR4 clears the bit; writing a 0 has no effect. 00 Core 4 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 4. 10 Reserved 11 Core 4 has responded with lreset_out. 7:6 LR3 Local Reset 3. Writing a 1 to LR3 clears the bit; writing a 0 has no effect. 00 Core 3 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 3. 10 Reserved 11 Core 3 has responded with lreset_out. 5:4 LR2 Local Reset 2. Writing a 1 to LR2 clears the bit; writing a 0 has no effect. 00 Core 2 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 2. 10 Reserved 11 Core 2 has responded with lreset_out. 3:2 LR1 Local Reset 1. Writing a 1 to LR1 clears the bit; writing a 0 has no effect. 00 Core 1 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 1. 10 Reserved 11 Core 1 has responded with lreset_out. 1:0 LR0 Local Reset 0. Writing a 1 to LR0 clears the bit; writing a 0 has no effect. 00 Core 0 has not received a local reset. 01 A local reset (lreset_in) has been asserted to Core 0. 10 Core 0 has responded with lreset_out in global boot situation. 11 Core 0 has responded with lreset_out. Copyright © 2009–2011, Texas Instruments Incorporated Device Configuration 85 Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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