LP3913 datasheet(42/70 Pages) TI1

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Control

Logic

Integrator

Comparator

8 Bit ADC

Dready

Overflow

Data

Enable

START

1&2

1&3

Vsignal

Vbias

LP3913

SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013

www.ti.com

If the USB current limit is 100 mA then the USB controller of the peripheral system needs to set the USBISEL logic

0 or by setting the ILIMIT register bits [D1, D0] to 2’b00.

If the USB current limit is 500 mA, then the USB controller needs to apply logic 1 to the USBISEL pin or change

the ILIMIT register accordingly. Under this condition, the LP3913 will allow charging with a charge current that is

determined by the Charge Control Register, not exceeding 500 mA.

The LP3913 will prevent (through internal circuitry) the charge current from exceeding the USB current limit, even

if the current setting in the Charge Control Register exceeds 500 mA.

The controller can also select a USB current limit of 800 mA through I2C that exceeds current USB spec values.

ILIMIT Register (03)h Current Limit Register

D7–2

D1–0

Access

Read only 0

Data

Reserved

USB Current Limit

00: controlled by USBISEL pin

[low = 100 mA, high = 500 mA]

01: 100 mA

10: 500 mA

11: 800 mA

Reset

n/a

2’b00

Analog-to-Digital Converter

LP3913 is equipped with an 8-bit dual-slope integrating analog-to-digital converter. Dual-slope converters provide

effective filtering of >500 kHz and <125 kHz noise components on the input voltage, and does not require a

sample and hold stage. The A/D converter core digitizes the input voltage ranging from VREF to 2VREF, where

VREF is the voltage measured on the VREFH pin. After an initial 2 ms warm-up for the first activation of the ADC

enable bit, the dual-slope converter integrates the input signal during the first phase for approximately 2 ms,

followed by a second phase that integrates VREF for 0 ms to 2 ms depending on the level of the input signal. As a

result the total conversion time varies from 2 ms to 4 ms.

Figure 64. Simplified ADC Block Diagram

The A/D converter multiplexes 4 different sources:

1. The battery voltage

2. The battery charge current

3. External source ADC1

4. External source ADC2

The voltage ranges for the first two sources are scaled to match the input voltage interval of the A/D converter:

[VREFH, 2VREFH]. This is accomplished by using two internal scalars.

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