LP3913 datasheet(30/70 Pages) TI1

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LP3913

SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013

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PON Register (00)h Power On Event Register

D7–5

Access

Read Only 0

Read Only

Data

Reserved

PACK

Battery Insert

PON by ONOFF

PON by CHG_IN

PON by USB

Power

0: Disable Power,

0: default

go in standby, and

wait for power on

event.

1: Acknowledge

1: Battery Insert

1: ONOFF caused 1: Power On

1: Power On

Power On request caused by Battery

Power On event

caused by

caused by USB

Insertion

CHG_IN power

power detection

detection

Reset

n/a

External Power and Battery Detection

When a Wall Adapter is detected, regardless of the battery voltage, the LP3913 moves to the Active Mode and

the Power-up sequencer is started. Similar to the ONOFF pin, there is a 32 ms deglitch time to ensure a clean

wall adapter detection and the system processor needs to set the PACK bit (D4) in the PON register or the

POWERACK pin within 128 ms (max) of the start of the power-up sequencer.

When USB PWR is detected and the battery is above the low battery alarm threshold, the LP3913 moves to the

Active Mode and the Power-up sequencer is started. Similar to the ONOFF pin, there is a 32 ms deglitch time to

ensure a clean USB detection and the system processor needs to set the PACK bit (D4) in the PON register or

the POWERACK pin within 128 ms (max) of the start of the power-up sequencer. If the battery is below the low

battery alarm threshold, the system will remain powered down until the USBPWR charges the battery up to the

battery low alarm threshold, at which point the power-up sequencer is started.

The four LSB bits of the PON register indicate which PON source was responsible for moving the LP3913 out of

standby and into active mode:

•

Battery insert

•

ONOFF push button

•

CHG_IN detect (connection of power adapter)

•

USB power (plug-in of powered USB cable)

These bits are cleared upon powering off.

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