TDA8029HLSLASHC2 datasheet(34/58 Pages) PHILIPS

34 / 58 page

2003 Oct 30

Philips Semiconductors

Product speciﬁcation

Low power single card reader

TDA8029

8.10.2.4

FIFO Control Register (FCR)

Table 50 FIFO control register, address Ch, write

Table 51 Description of register bits

TBE/RBF

Transmit Buffer Empty/Receive Buffer Full. This bit is set when:

• Changing from reception mode to transmission mode

• A character has been transmitted by the UART (except when a character has been

parity error free transmitted whilst LCT = 1)

• The reception buffer is full.

This bit is reset:

• After power-on

• When bit RIU in register CSR is reset

• When a character has been written in register UTR

• When the character has been read from register URR

• When changing from transmission mode to reception mode.

BIT

543210

Symbol

−

PEC2

PEC1

PEC0

−

FL2

FL1

FL0

Reset value

−

000

−

000

BIT

SYMBOL

DESCRIPTION

−

Not used.

6 to 4

PEC[2:0]

Parity Error Counter. These bits determine the number of parity errors before setting bit

PE in register USR and pulling INT0_N LOW. PEC[2:0] = 000 means that if only one

parity error has occurred, bit PE is set; PEC[2:0] = 111 means that bit PE will be set

after 8 parity errors.

In protocol T = 0:

• If a correct character is received before the programmed error number is reached, the

error counter will be reset

• If the programmed number of allowed parity errors is reached, bit PE in register USR

will be set as long as the USR has not been read

• If a transmitted character is NAKed by the card, then the TDA8029 will automatically

retransmit it a number of times equal to the value programmed in PEC[2:0]. The

character will be resent at 15 ETU.

• In transmission mode, if PEC[2:0] = 000, then the automatic retransmission is

invalidated. The character manually rewritten in register UTR will start at 13.5 ETU.

In protocol T = 1:

• The error counter has no action (bit PE is set at the ﬁrst wrong received character).

−

Not used.

2 to 0

FL[2:0]

FIFO Length. These bits determine the depth of the FIFO: FL[2:0] = 000 means length

1, FL[2:0] = 111 means length 8.

BIT

SYMBOL

DESCRIPTION

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