TDA8029HLSLASHC2 datasheet(32/58 Pages) PHILIPS

32 / 58 page

2003 Oct 30

Philips Semiconductors

Product speciﬁcation

Low power single card reader

TDA8029

8.10.2.2

UART Receive Register (URR)

Table 46 UART receive register, address Dh, read

Table 47 Description of register bits

BIT

543210

Symbol

UR7

UR6

UR5

UR4

UR3

UR2

UR1

UR0

Reset value

00000

BIT

SYMBOL

DESCRIPTION

7 to 0

UR[7:0]

UART receive bits. When the microcontroller wants to read data from the card, it reads

it from this register in direct convention:

• With a synchronous card, only UR0 is relevant and is a copy of the state of the selected

card I/O

• When needed, this register may be tied to a FIFO whose length ‘n’ is programmable

between 1 and 8; if n > 1, then no interrupt is given until the FIFO is full and the

controller may empty the FIFO when required

• With a parity error:

– In protocol T = 0, the received byte is not stored in the FIFO and the error counter is

incremented. The error counter is programmable between 1 and 8. When the

programmed number is reached, then bit PE is set in the status register USR and

INT0_N falls LOW. The error counter must be reprogrammed to the desired value

after its count has been reached

– In protocol T = 1, the character is loaded in the FIFO and the bit PE is set to the

programmed value in the parity error counter.

• When the FIFO is full, then bit RBF in the status register USR is set. This bit is reset

when at least one character has been read from URR

• When the FIFO is empty, then bit FE is set in the status register USR as long as no

character has been received.

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