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Notes

1. Register is bit addressable.

2. Register is modified from or added to the 80C51 SFRs.

3. Reset value depends on reset source.

4. Bit will not be affected by reset.

SBUF

serial data buffer 99

−

XXXX XXXX

serial control

98

SM0/FE

SM1

SM2

REN

TB8

RB8

TI

RI

0000 0000

9F

9E

9D

9C

9B

9A

99

98

SP

stack pointer

81

−

0000 0111

timer control

88

TF1

TR1

TF0

TE0

IE1

IT1

IE0

IT0

0000 0000

8F

8E

8D

8C

8B

8A

89

88

timer 2 control

C8

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2

CP/RL2

0000 0000

CF

CE

CD

CC

CB

CA

C9

C8

timer 2 mode

control

C9

−−−−−−

T2OE

DCEN

XXXX XX00

TH0

timer high 0

8C

−

0000 0000

TH1

timer high 1

8D

−

0000 0000

timer high 2

CD

−

0000 0000

TL0

timer low 0

8A

−

0000 0000

TL1

timer low 1

8B

−

0000 0000

timer low 2

CC

−

0000 0000

TMOD

timer mode

89

GATE

C/TM1

M0

GATE

C/T

M1

M0

0000 0000

SYMBOL

DESCRIPTION

ADDR

(HEX)

BIT ADDRESS, SYMBOL OR ALTERNATIVE PORT FUNCTION

RESET

VALUE

(BINARY)