TDA8029HLSLASHC2 datasheet(14/58 Pages) PHILIPS

14 / 58 page

2003 Oct 30

Philips Semiconductors

Product speciﬁcation

Low power single card reader

TDA8029

8.2.2

TIMER/COUNTER 2MODE CONTROL REGISTER (T2MOD)

Table 7

Timer/counter 2 mode control register bits

Table 8

Description of register bits

Note

1. Do not write logic 1s to reserved bits. These bits may be used in future 80C51 family products to invoke new features.

In that case, the reset or inactive value of the new bit will be logic 0, and its active value will be logic 1. The value

read from a reserved bit is indeterminate.

BIT

543210

Symbol

−

−−−−

T2OE

DCEN

BIT

SYMBOL

DESCRIPTION

7to2

−

Not implemented. Reserved for future use; note 1.

T2OE

Timer 2 Output Enable.

DCEN

Down Counter Enable. When set, allows timer 2 to be conﬁgured as up-/down-counter.

8.2.3

AUTO-RELOAD MODE (UP- OR DOWN-COUNTER)

In the 16-bit auto-reload mode, timer 2 can be configured

as either a timer or counter (bit C/T2 in register T2CON)

and programmed to count up or down. The counting

direction is determined by bit DCEN (down-counter

enable) which is located in the T2MOD register. When

reset, DCEN = 0 and timer 2 will default to counting up. If

DCEN = 1, timer 2 can count up or down depending on the

value of T2EX.

When DCEN = 0, timer 2 will count up automatically.

In this mode there are two options selected by bit EXEN2

in register T2CON. If EXEN2 = 0, then timer 2 counts up to

0FFFFh and sets the TF2 overflow flag upon overflow.

This causes the timer 2 registers to be reloaded with the

16-bit value in RCAP2L and RCAP2H. The values in

RCAP2L and RCAP2H are preset by software. If

EXEN2 = 1, then a 16-bit reload can be triggered either by

an overflow or by a HIGH to LOW transition at controller

input T2EX. This transition also sets the EXF2 bit. The

timer 2 interrupt, if enabled, can be generated when either

TF2 or EXF2 are logic 1. See Fig.3 for an overview.

DCEN = 1 enables timer 2 to count up- or down. This

mode allows T2EX to control the direction of count. When

a HIGH level is applied at T2EX timer 2 will count up.

Timer 2 will overflow at 0FFFFh and set the TF2 flag,

which can then generate an interrupt, if the interrupt is

enabled. This timer overflow also causes the 16-bit value

in RCAP2L and RCAP2H to be reloaded into the timer

registers TL2 and TH2. When a LOW level is applied at

T2EX this causes timer 2 to count down. The timer will

underflow when TL2 and TH2 become equal to the value

stored in RCAP2L and RCAP2H. Timer 2 underflow sets

the TF2 overflow flag and causes 0FFFFh to be reloaded

into the timer registers TL2 and TH2. See Fig.4 for an

overview.

The external flag EXF2 toggles when timer 2 underflows or

overflows. This EXF2 bit can be used as a 17th bit of

resolution if needed. The EXF2 flag does not generate an

interrupt in this mode of operation.

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