PIC18F242 datasheet(55/332 Pages) MICROCHIP

55 / 332 page

DS39564C-page 53

PIC18FXX2

4.14

RCON Register

The Reset Control (RCON) register contains flag bits

that allow differentiation between the sources of a

device RESET. These flags include the TO, PD, POR,

BOR and RI bits. This register is readable and writable.

RCON REGISTER

Note 1: If the BOREN configuration bit is set

(Brown-out Reset enabled), the BOR bit is

’1’ on a Power-on Reset. After a Brown-

out Reset has occurred, the BOR bit will

be cleared, and must be set by firmware to

indicate the occurrence of the next

Brown-out Reset.

2: It is recommended that the POR bit be set

after

Power-on

Reset

has

been

detected, so that subsequent Power-on

Resets may be detected.

R/W-0

U-0

R/W-1

R-1

R/W-0

IPEN

—

—RI

POR

BOR

bit 7

bit 0

bit 7

IPEN: Interrupt Priority Enable bit

= Enable priority levels on interrupts

= Disable priority levels on interrupts (16CXXX Compatibility mode)

bit 6-5

Unimplemented: Read as '0'

bit 4

RI: RESET Instruction Flag bit

= The RESET instruction was not executed

= The RESET instruction was executed causing a device RESET

(must be set in software after a Brown-out Reset occurs)

bit 3

TO: Watchdog Time-out Flag bit

= After power-up, CLRWDT instruction, or SLEEP instruction

= A WDT time-out occurred

bit 2

PD: Power-down Detection Flag bit

= After power-up or by the CLRWDT instruction

= By execution of the SLEEP instruction

bit 1

POR: Power-on Reset Status bit

= A Power-on Reset has not occurred

= A Power-on Reset occurred

(must be set in software after a Power-on Reset occurs)

bit 0

BOR: Brown-out Reset Status bit

= A Brown-out Reset has not occurred

= A Brown-out Reset occurred

(must be set in software after a Brown-out Reset occurs)

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

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