PIC18F242 datasheet(40/332 Pages) MICROCHIP

40 / 332 page

PIC18FXX2

DS39564C-page 38

STKPTR REGISTER

FIGURE 4-3:

RETURN ADDRESS STACK AND ASSOCIATED REGISTERS

4.2.3

PUSH AND POP INSTRUCTIONS

Since the Top-of-Stack (TOS) is readable and writable,

the ability to push values onto the stack and pull values

off the stack without disturbing normal program execu-

tion is a desirable option. To push the current PC value

onto the stack, a PUSH instruction can be executed.

This will increment the stack pointer and load the cur-

rent PC value onto the stack. TOSU, TOSH and TOSL

can then be modified to place a return address on the

stack.

The ability to pull the TOS value off of the stack and

replace it with the value that was previously pushed

onto the stack, without disturbing normal execution, is

achieved by using the POP instruction. The POP instruc-

tion discards the current TOS by decrementing the

stack pointer. The previous value pushed onto the

stack then becomes the TOS value.

4.2.4

STACK FULL/UNDERFLOW RESETS

These resets are enabled by programming the

STVREN configuration bit. When the STVREN bit is

disabled, a full or underflow condition will set the appro-

priate STKFUL or STKUNF bit, but not cause a device

RESET. When the STVREN bit is enabled, a full or

underflow will set the appropriate STKFUL or STKUNF

bit and then cause a device RESET. The STKFUL or

STKUNF bits are only cleared by the user software or

a POR Reset.

R/C-0

U-0

R/W-0

STKOVF

STKUNF

—

SP4

SP3

SP2

SP1

SP0

bit 7

bit 0

bit 7(1)

STKOVF: Stack Full Flag bit

= Stack became full or overflowed

= Stack has not become full or overflowed

bit 6(1)

STKUNF: Stack Underflow Flag bit

= Stack underflow occurred

= Stack underflow did not occur

bit 5

Unimplemented: Read as '0'

bit 4-0

SP4:SP0: Stack Pointer Location bits

Note 1: Bit 7 and bit 6 can only be cleared in user software or by a POR.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

00011

0x001A34

11111

11110

11101

00010

00001

00000

00010

Return Address Stack

Top of Stack

0x000D58

TOSL

TOSH

TOSU

0x34

0x1A

0x00

STKPTR<4:0>

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