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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F242 датащи(PDF) 23 Page - Microchip Technology |
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PIC18F242 датащи(HTML) 23 Page - Microchip Technology |
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23 / 332 page  © 2006 Microchip Technology Inc. DS39564C-page 21 PIC18FXX2 2.6.1 SYSTEM CLOCK SWITCH BIT The system clock source switching is performed under software control. The system clock switch bit, SCS (OSCCON<0>) controls the clock switching. When the SCS bit is ’0’, the system clock source comes from the main oscillator that is selected by the FOSC configura- tion bits in Configuration Register1H. When the SCS bit is set, the system clock source will come from the Timer1 oscillator. The SCS bit is cleared on all forms of RESET. REGISTER 2-1: OSCCON REGISTER Note: The Timer1 oscillator must be enabled and operating to switch the system clock source. The Timer1 oscillator is enabled by setting the T1OSCEN bit in the Timer1 control register (T1CON). If the Timer1 oscillator is not enabled, then any write to the SCS bit will be ignored (SCS bit forced cleared) and the main oscillator will continue to be the system clock source. U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-1 — — — — — — —SCS bit 7 bit 0 bit 7-1 Unimplemented: Read as '0' bit 0 SCS: System Clock Switch bit When OSCSEN configuration bit = ’0’ and T1OSCEN bit is set: 1 = Switch to Timer1 oscillator/clock pin 0 = Use primary oscillator/clock input pin When OSCSEN and T1OSCEN are in other states: bit is forced clear Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown |
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