JS28F256P30B95A datasheet(25/97 Pages) MICRON

25 / 97 page

August 2008

Datasheet

Order Number: 306666-12

P30

6.2

Device Command Bus Cycles

Device operations are initiated by writing specific device commands to the Command

User Interface (CUI). Several commands are used to modify array data including Word

Program and Block Erase commands. Writing either command to the CUI initiates a

sequence of internally-timed functions that culminate in the completion of the

requested task. However, the operation can be aborted by either asserting RST# or by

issuing an appropriate suspend command.

Erase

0x20

Block Erase Setup

First cycle of a 2-cycle command; prepares the CUI for a block-erase

operation. The WSM performs the erase algorithm on the block addressed by

the Erase Confirm command. If the next command is not the Erase Confirm

(0xD0) command, the CUI sets Status Register bits SR[4] and SR[5], and

places the device in read status register mode.

0xD0

Block Erase Confirm

If the first command was Block Erase Setup (0x20), the CUI latches the

address and data, and the WSM erases the addressed block. During block-

erase operations, the device responds only to Read Status Register and Erase

Suspend commands. CE# or OE# must be toggled to update the Status

Status Register Data for synchronous Non-array reads

Suspend

0xB0

Program or Erase

Suspend

This command issued to any device address initiates a suspend of the

currently-executing program or block erase operation. The Status Register

indicates successful suspend operation by setting either SR[2] (program

suspended) or SR[6] (erase suspended), along with SR[7] (ready). The Write

State Machine remains in the suspend mode regardless of control signal

states (except for RST# asserted).

0xD0

Suspend Resume

This command issued to any device address resumes the suspended program

or block-erase operation.

Block Locking/

Unlocking

0x60

Lock Block Setup

First cycle of a 2-cycle command; prepares the CUI for block lock

configuration changes. If the next command is not Block Lock (0x01), Block

Unlock (0xD0), or Block Lock-Down (0x2F), the CUI sets Status Register bits

SR[4] and SR[5], indicating a command sequence error.

0x01

Lock Block

If the previous command was Block Lock Setup (0x60), the addressed block

is locked.

0xD0

Unlock Block

If the previous command was Block Lock Setup (0x60), the addressed block

is unlocked. If the addressed block is in a lock-down state, the operation has

no effect.

0x2F

Lock-Down Block

If the previous command was Block Lock Setup (0x60), the addressed block

is locked down.

Protection

0xC0

Program Protection

First cycle of a 2-cycle command; prepares the device for a Protection

Configuration

0x60

Read Configuration

First cycle of a 2-cycle command; prepares the CUI for device read

configuration. If the Set Read Configuration Register command (0x03) is not

the next command, the CUI sets Status Register bits SR[4] and SR[5],

indicating a command sequence error.

0x03

Read Configuration

If the previous command was Read Configuration Register Setup (0x60), the

CUI latches the address and writes A[15:0] to the Read Configuration

subsequent read operations access array data.

Table 11: Command Codes and Definitions (Sheet 2 of 2)

Mode

Code

Device Mode

Description

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