JS28F256P30B95A datasheet(87/97 Pages) MICRON

87 / 97 page

August 2008

Datasheet

Order Number: 306666-12

P30

A.3

Write State Machine

Figure 42 through Figure 47 show the command state transitions (Next State Table)

based on incoming commands. Only one partition can be actively programming or

erasing at a time. Each partition stays in its last read state (Read Array, Read Device

ID, Read CFI or Read Status Register) until a new command changes it. The next WSM

state does not depend on the partition’s output state.

Figure 41: Protection Register Programming Flowchart

FULL STATUS CHECK PROCEDURE

Program Protection Register operation addresses must be

within the Protection Register address space. Addresses

outside this space will return an error.

Repeat for subsequent programming operations.

Full Status Register check can be done after each program, or

after a sequence of program operations.

Write 0xFF after the last operation to set Read Array state.

Only the Clear Staus Register command clears SR[1, 3, 4].

If an error is detected, clear the Status register before

attempting a program retry or other error recovery.

PROTECTION REGISTER PROGRAMMING PROCEDURE

Start

Write 0xC0,

PR Address

Write PR

Address & Data

Read Status

SR[7] =

Full Status

Check

(if desired)

Program

Complete

Read Status

Program

Successful

SR[3] =

SR[4] =

SR[1] =

PP Range Error

Program Error

Program Aborted

Idle

Bus

Operation

None

Command

Check SR[3]:

1 =V

PP Range Error

Check SR[4]:

1 =Programming Error

Comments

Write

Idle

Program

PR Setup

Protection

Program

None

Data = 0xC0

Addr = First Location to Program

Data = Data to Program

Addr = Location to Program

Check SR[7]:

1 = WSM Ready

0 = WSM Busy

Bus

Operation

Command

Comments

Read

None

Status Register Data.

Idle

None

Check SR[1]:

1 =Block locked; operation aborted

(Program Setup)

(Confirm Data)

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