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JS28F256P30B95A датащи(PDF) 49 Page - Micron Technology |
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JS28F256P30B95A датащи(HTML) 49 Page - Micron Technology |
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49 / 97 page ![]() August 2008 Datasheet Order Number: 306666-12 49 P30 11.3.2 Programming the OTP Registers To program any of the OTP Registers, first issue the Program OTP Register command at the parameter’s base address plus the offset to the desired OTP Register (see Section 6.0, “Command Set” on page 24). Next, write the desired OTP Register data to the same OTP Register address (see Figure 16, “OTP register map” on page 48). The device programs the 64-bit and 128-bit user-programmable OTP Register data 16 bits at a time (see Figure 41, “Protection Register Programming Flowchart” on page 87). Issuing the Program OTP Register command outside of the OTP Register’s address space causes a program error (SR[4] set). Attempting to program a locked OTP Register causes a program error (SR[4] set) and a lock error (SR[1] set). Note: When programming the OTP bits in the OTP registers for a Top Parameter Device, the following upper address bits must also be driven properly: A[Max:17] driven high (VIH) for TSOP and Easy BGA packages, and A[Max:16] driven high (VIH) for QUAD+ SCSP. 11.3.3 Locking the OTP Registers Each OTP Register can be locked by programming its respective lock bit in the Lock Register. To lock a OTP Register, program the corresponding bit in the Lock Register by issuing the Program Lock Register command, followed by the desired Lock Register data (see Section 6.0, “Command Set” on page 24). The physical addresses of the Lock Registers are 0x80 for register 0 and 0x89 for register 1. These addresses are used when programming the lock registers (see Table 13, “Device Identifier Information” on page 28). Bit 0 of Lock Register 0 is already programmed during the manufacturing process at the “factory”, locking the lower, pre-programmed 64-bit region of the first 128-bit OTP Register containing the unique identification number of the device. Bit 1 of Lock Register 0 can be programmed by the user to lock the user-programmable, 64-bit region of the first 128-bit OTP Register. When programming Bit 1 of Lock Register 0, all other bits need to be left as ‘1’ such that the data programmed is 0xFFFD. Lock Register 1 controls the locking of the upper sixteen 128-bit OTP Registers. Each of the 16 bits of Lock Register 1 correspond to each of the upper sixteen 128-bit OTP Registers. Programming a bit in Lock Register 1 locks the corresponding 128-bit OTP Register. Caution: After being locked, the OTP Registers cannot be unlocked. |
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