M68ICS08GR datasheet(190/408 Pages) FREESCALE

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Monitor ROM (MON)

Technical Data

MC68HC908GR8 — Rev 4.0

190

Monitor ROM (MON)

MOTOROLA

•

FLASH memory security feature(1)

•

FLASH memory programming interface

•

Enhanced PLL (phase-locked loop) option to allow use of external

32.768-kHz crystal to generate internal frequency of 2.4576 MHz

•

310 byte monitor ROM code size ($FE20 to $FF55)

•

Monitor mode entry without high voltage, VTST, if reset vector is

blank ($FFFE and $FFFF contain $FF)

•

Standard monitor mode entry if high voltage, VTST, is applied to

IRQ

15.4 Functional Description

The monitor ROM receives and executes commands from a host

computer. Figure 15-1 shows an example circuit used to enter monitor

mode and communicate with a host computer via a standard RS-232

interface.

Simple monitor commands can access any memory address. In monitor

mode, the MCU can execute code downloaded into RAM by a host

computer while most MCU pins retain normal operating mode functions.

All communication between the host computer and the MCU is through

the PTA0 pin. A level-shifting and multiplexing interface is required

between PTA0 and the host computer. PTA0 is used in a wired-OR

configuration and requires a pullup resistor.

1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or

copying the FLASH difficult for unauthorized users.

Freescale Semiconductor, Inc.

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