M68ICS08GR datasheet(165/408 Pages) FREESCALE

165 / 408 page

Flash Memory

FLASH Block Protection

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Flash Memory

165

11.8.1 FLASH Block Protect Register

The FLASH block protect register (FLBPR) is implemented as a byte

within the FLASH memory, and therefore can only be written during a

programming sequence of the FLASH memory. The value in this register

determines the starting location of the protected range within the FLASH

memory.

BPR[7:0] — FLASH Block Protect Bits

These eight bits represent bits [13:6] of a 16-bit memory address.

Bits [15:14] are logic 1s and bits [5:0] are logic 0s.

The resultant 16-bit address is used for specifying the start address

of the FLASH memory for block protection. The FLASH is protected

from this start address to the end of FLASH memory, at $FFFF. With

this mechanism, the protect start address can be $XX00, $XX40,

$XX80, and $XXC0 (64 bytes page boundaries) within the FLASH

memory.

Figure 11-4. FLASH Block Protect Start Address

Address:

$FF7E

Bit 7

654321

Bit 0

Read:

BPR7

BPR6

BPR5

BPR4

BPR3

BPR2

BPR1

BPR0

Write:

Reset:

UUUUUUUU

U = Unaffected by reset. Initial value from factory is 1.

Write to this register is by a programming sequence to the FLASH memory.

Figure 11-3. FLASH Block Protect Register (FLBPR)

FLBPR value

16-bit memory address

0000

Start address of FLASH block protect

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

M68ICS08GR датащи(PDF) 165 Page - Freescale Semiconductor, Inc

M68ICS08GR датащи(HTML) 165 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL