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WM8945ECS/R датащи(PDF) 117 Page - Wolfson Microelectronics plc

номер детали WM8945ECS/R
подробное описание детали  Mono Low-Power CODEC with Video Buffer and Touch Panel Controller
PDF  169 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8945ECS/R датащи(HTML) 117 Page - Wolfson Microelectronics plc

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Production Data
WM8945
w
PD, May 2011, Rev 4.1
117
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
0 = Disabled
1 = Enabled
8
SYSCLK_SRC
1
SYSCLK Source Select
0 = MCLK
1 = FLL output
7:5
SYSCLK_DIV
[2:0]
000
SYSCLK Clock divider
(Sets the scaling for either the MCLK or FLL clock
output, depending on SYSCLK_SRC)
000 = divide by 1
001 = divide by 1.5
010 = divide by 2
011 = divide by 3
100 = divide by 4
101 = divide by 6
110 = divide by 8
111 = divide by 12
4
TOCLK_ENA
0
TOCLK Enabled
(Enables timeout clock for GPIO level detection, AMU,
and PGA zero cross timeout)
0 = Disabled
1 = Enabled
3:1
BCLK_DIV[2:0]
011
BCLK Frequency (Master mode)
000 = SYSCLK
001 = SYSCLK / 2
010 = SYSCLK / 4
011 = SYSCLK / 8
100 = SYSCLK / 16
101 = SYSCLK / 32
110 = reserved
111 = reserved
0
MSTR
0
Digital Audio Interface Mode select
0 = Slave mode
1 = Master mode
Register 06h
Clock Gen control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R7 (07h)
Additional
control
11
VMID_FAST_S
TART
0
VMID (fast-start) Enable
0 = Disabled
1 = Enabled
10
VMID_REF_SE
L
0
VMID Source Select
0 = LDO supply (LDOVDD)
1 = LDO output (LDOVOUT)
9
VMID_CTRL
0
VMID Ratio control
Sets the ratio of VMID to the source selected by
VMID_REF_SEL
0 = 5/11
1 = 1/2
8
STARTUP_BIA
S_ENA
0
Start-Up Bias Enable
0 = Disabled
1 = Enabled
7
BIAS_SRC
0
Bias Source select



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