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WM8945ECS/R датащи(PDF) 70 Page - Wolfson Microelectronics plc |
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WM8945ECS/R датащи(HTML) 70 Page - Wolfson Microelectronics plc |
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70 / 169 page ![]() WM8945 Production Data w PD, May 2011, Rev 4.1 70 u-law Companding 0 20 40 60 80 100 120 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Normalised Input 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Figure 28 µ-Law Companding A-law Companding 0 20 40 60 80 100 120 0 0.2 0.4 0.6 0.8 1 Normalised Input 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Figure 29 A-Law Companding The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted for -law, all even data bits are inverted for A-law). Companded data is transmitted in the first 8 MSBs of its respective data word, and consists of sign (1 bit), exponent (3 bits) and mantissa (4 bits), as shown in Table 46. BIT7 BIT[6:4] BIT[3:0] SIGN EXPONENT MANTISSA Table 46 8-bit Companded Word Composition 8-bit mode is selected whenever DAC_COMP=1 or ADC_COMP=1. The use of 8-bit data allows samples to be passed using as few as 8 BCLK cycles per Left/Right Clock frame. When using DSP mode B, 8-bit data words may be transferred consecutively every 8 BCLK cycles. |
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