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WM8945ECS/R датащи(PDF) 81 Page - Wolfson Microelectronics plc |
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WM8945ECS/R датащи(HTML) 81 Page - Wolfson Microelectronics plc |
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81 / 169 page ![]() Production Data WM8945 w PD, May 2011, Rev 4.1 81 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R38 (26h) Video Buffer 7 VB_ENA 0 Video buffer enable 0 = Disabled 1 = Enabled 6 VB_QBOOST 0 Video buffer filter Q-Boost control 0 = Disabled 1 = Enabled 5 VB_GAIN 0 Video buffer gain 0 = 0dB (=6dB unloaded) 1 = 6dB (=12dB unloaded) 4:3 VB_DISOFF 111 Video buffer DC offset control 000 = Reserved 001 = 40mV offset 010 = Reserved 011 = 20mV offset 100 = Reserved 101 = Reserved 110 = Reserved 111 = 0mV offset Note – the specified offset applies to the 0dB gain setting (VB_GAIN=0). When 6dB gain is selected, the DC offset is doubled. 1 VB_PD 0 Video buffer pull-down 0 = pull-down disabled 1 = pull-down enabled 0 VB_CLAMP 0 Enable the clamp between the video input and ground 0 = no clamp 1 = Video buffer input is clamped to ground Table 55 Video Buffer Control The video buffer circuit is illustrated in Figure 33. Figure 33 Video Buffer Block Diagram The video buffer requires two external resistor components, as illustrated in Figure 33. For best performance, the resistor RSOURCE should be matched (equal) to the load impedance RLOAD. |
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