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HT95R34 датащи(PDF) 37 Page - Holtek Semiconductor Inc |
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HT95R34 датащи(HTML) 37 Page - Holtek Semiconductor Inc |
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37 / 59 page ![]() HT95R34 Rev. 1.10 37 February 18, 2009 DTMF Data Output Table Low Group (Hz) High Group (Hz) Digit D3, D2, D1, D0 697 1209 1 0001 697 1336 2 0010 697 1477 3 0011 770 1209 4 0100 770 1336 5 0101 770 1477 6 0110 852 1209 7 0111 852 1336 8 1000 852 1477 9 1001 941 1336 0 1010 941 1209 * 1011 941 1477 # 1100 697 (Note*) 1633 A 1101 770 (Note*) 1633 B 1110 842 (Note*) 1633 C 1111 941 (Note*) 1633 D 0000 (Note*): Available only when R_INH=0 Steering Control Circuit The steering control circuit is used to measure the effective signal duration and for protecting against a valid signal drop out. This is achieved using an analog delay which is implemented using an external RC time-constant, controlled by the output line EST. The timing diagram shows more details. The EST pin is normally low and will pull the RT/GT pin low via the external RC network. When a valid tone input is detected, the EST pin will go high, which will in turn pull the RT/GT pin high through the RC network. When the voltage on RT/GT rises from 0 to VTRT, which is 2.35V for a 5V power supply, the input signal is effective, and the corresponding code will be generated by the code detector. After D0~D3 have been latched, DV will go high. When the voltage on RT/GT falls from VDD to VTRT, i.e. when there is no input tone, the DV output will go low, and D0~D3 will maintain their present data until a next valid tone input is produced. By selecting suitable external RC values, the mini- mum acceptable input tone duration, tACC, and the minimum acceptable inter-tone rejection, tIR, can be set. The values of the external RC components, can be chosen using the following formula. tACC=tDP+tGTP; tIR=tDA+tGTA; Where tACC: Tone duration acceptable time tDP: EST output delay time ( ²L²®²H²) tGTP: Tone present time tIR: Inter-digit pause rejection time tDA: EST outptu delay time ( ²H²®²L²) tGTA: Tone absent time |
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