HT95R34 datasheet(27/59 Pages) HOLTEK

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HT95R34

Rev. 1.10

February 18, 2009

Peripheral Interrupt

For a Peripheral interrupt to occur, the global interrupt

enable bit, EMI, and the corresponding peripehral inter-

rupt enable bit, EPERI, must first be set. An actual Pe-

ripheral interrupt will take place when the Peripheral

interrupt request flag, PERF, is set, a situation that will

occur when DTMF receiver detects a valid character.

When the interrupt is enabled, the stack is not full and a

Peripheral interrupt request occurs, a subroutine call to

the peripheral interrupt vector at location 10H, will take

place. When the interrupt is serviced, the peripheral in-

terrupt request flag, PERF, will be automatically reset

and the EMI bit will be automatically cleared to disable

other interrupts.

Real Time Clock Interrupt

For a Real Time Clock interrupt to occur, the global inter-

rupt enable bit, EMI, and the corresponding real timer

clock interrupt enable bit, ERTCI, must first be set. An

actual Real Time Clock interrupt will take place when the

Real Time Clock request flag, RTCF, is set, a situation

that will occur when the RTC times out which will occur

every second. When the interrupt is enabled, the stack

is not full and a Real Time Clock interrupt request oc-

curs, a subroutine call to the real time clock interrupt

vector at location 14H, will take place. When the inter-

rupt is serviced, the timer interrupt request flag, RTCF,

will be automatically reset and the EMI bit will be auto-

matically cleared to disable other interrupts.

Multi-function Interrupt

For a Multi-function interrupt to occur, the global inter-

rupt enable bit, EMI, and the corresponding

multi-function interrupt enable bit, EMFI, must first be

set. An actual Multi-function interrupt will take place

when the Multi-function interrupt request flag, MFF, is

set, a situation that will occur when PC0 or PC5 has a

falling edge or PC7 has a rising edge. When the inter-

rupt is enabled, the stack is not full and a Multi-function

interrupt request occurs, a subroutine call to the

multi-function interrupt vector at location 18H, will take

place. When the interrupt is serviced, the multi-function

interrupt request flag, MFF, will be automatically reset

and the EMI bit will be automatically cleared to disable

other interrupts.

Programming Considerations

By disabling the interrupt enable bits, a requested inter-

rupt can be prevented from being serviced, however,

once an interrupt request flag is set, it will remain in this

condition in the INTC register until the corresponding in-

terrupt is serviced or until the request flag is cleared by a

software instruction.

It is recommended that programs do not use the

²CALL

subroutine

² instruction within the interrupt subroutine. In-

terrupts often occur in an unpredictable manner or need

to be serviced immediately in some applications. If only

one stack is left and the interrupt is not well controlled, the

original control sequence will be damaged once a

²CALL

subroutine

² is executed in the interrupt subroutine.

All of these interrupts have the capability of waking up

the processor when in the Power Down Mode. Only the

Program Counter is pushed onto the stack. If the con-

tents of the register or status register are altered by the

interrupt service program, which may corrupt the de-

sired control sequence, then the contents should be

saved in advance.

Reset and Initialisation

A reset function is a fundamental part of any

microcontroller ensuring that the device can be set to

some predetermined condition irrespective of outside

parameters. The most important reset condition is after

power is first applied to the microcontroller. In this case,

internal circuitry will ensure that the microcontroller, af-

ter a short delay, will be in a well defined state and ready

to execute the first program instruction. After this

power-on reset, certain important internal registers will

be set to defined states before the program com-

mences. One of these registers is the Program Counter,

which will be reset to zero forcing the microcontroller to

begin program execution from the lowest Program

Memory address.

In addition to the power-on reset, situations may arise

where it is necessary to forcefully apply a reset condition

when the microcontroller is running. One example of this

is where after power has been applied and the

microcontroller is already running, the RES line is force-

fully pulled low. In such a case, known as a normal oper-

ation reset, some of the microcontroller registers remain

unchanged allowing the microcontroller to proceed with

normal operation after the reset line is allowed to return

high. Another type of reset is when the Watchdog Timer

overflows and resets the microcontroller. All types of re-

set operations result in different register conditions be-

ing setup.

Another reset exists in the form of a Low Voltage Reset,

LVR, where a full reset, similar to the RES reset is imple-

mented in situations where the power supply voltage

falls below a certain threshold.

Reset Functions

There are five ways in which a microcontroller reset can

occur, through events occurring both internally and ex-

ternally:

· Power-on Reset

The most fundamental and unavoidable reset is the

one that occurs after power is first applied to the

microcontroller. As well as ensuring that the Program

Memory begins execution from the first memory ad-

dress, a power-on reset also ensures that certain

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