HT95R34 datasheet(32/59 Pages) HOLTEK

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HT95R34

Rev. 1.10

February 18, 2009

· Normal mode or Green mode to Sleep mode:

Step 1: Clear bit MODE0 to 0

Step 2: Clear bit MODE1 to 0

Step 3: Clear bit UPEN to 0

Step 4: Execute the HALT instruction

After Step 4, the operational mode will be changed to

the Sleep mode.

· Normal mode or Green mode to Idle mode:

Step 1: Set bit MODE0 to 1

Step 2: Clear bit MODE1 to 0

Step 3: Clear bit UPEN to 0

Step 4: Execute the HALT instruction

After Step 4, the operational mode will be changed to

the Idle mode.

· Green mode to Normal mode:

Step 1: Set bit UPEN to 1

Step 2: Execute a 20ms software delay

Step 3: Set bit MODE1 to 1

After Step 3, the operational mode will be changed to

the Normal mode.

· Sleep mode or Idle mode to Green mode:

Method 1: The occurrence of any reset condition

Method 2: Any active interrupt

Method 3: A Port A wake-up

Note that a Timer/Event Counter 0/1 and RTC interrupt

will not be generated when in the Idle mode as the

32768Hz crystal oscillator is stopped.

Standby Current Considerations

As the main reason for entering the Power Down Mode

is to keep the current consumption of the MCU to as low

a value as possible, perhaps only in the order of several

micro-amps, there are other considerations which must

also be taken into account by the circuit designer if the

power consumption is to be minimised. Special atten-

tion must be made to the I/O pins on the device. All

high-impedance input pins must be connected to either

a fixed high or low level as any floating input pins could

create internal oscillations and result in increased cur-

rent consumption. Care must also be taken with the

loads, which are connected to I/Os, which are setup as

outputs. These should be placed in a condition in which

minimum current is drawn or connected only to external

circuits that do not draw current, such as other CMOS

inputs. Also note that additional standby current will also

be required if the configuration options have enabled the

Watchdog Timer internal oscillator.

Wake-up

A reset, interrupt or port A wake-up can all wake up the

device from the Sleep Mode or the Idle Mode. A reset

can include a power-on reset, an external reset or a

WDT time-out reset. By examining the device status

flags, PDF and TO, the program can distinguish be-

tween the different reset conditions. Refer to the Reset

section for a more detailed description.

A port A wake-up and an interrupt can be considered as

a continuation of normal execution. Each bit in port A

can be independently selected to wake-up the device

using configuration options. When awakened by a Port

A stimulus, the program will resume execution at the

next instruction following the HALT instruction.

Any valid interrupt during the Sleep Mode or Idle Mode

may have one of two consequences. One is if the re-

lated interrupt is disabled or the interrupt is enabled but

the stack is full, the program will resume execution at the

next instruction. The other is if the interrupt is enabled

and the stack is not full, the regular interrupt response

takes place. It is necessary to mention that if an interrupt

request flag is set to "1" before entering the Sleep mode

or Idle mode, the Wake-up function of the related inter-

rupt will be disabled.

Once a Sleep mode or Idle mode Wake-up event oc-

curs, it will take an SST delay time, which is 1024 sys-

tem clock periods, to resume to the Green mode. This

means that a dummy period is inserted after a Wake-up.

If the Wake-up results from an interrupt acknowledge

signal, the actual interrupt subroutine execution will be

delayed by one or more cycles. If the Wake-up results in

the next instruction execution, this will be executed im-

mediately after the dummy period has finished.

To minimise power consumption, all the I/O pins should

be carefully managed before entering the Sleep Mode

or Idle Mode.

The Sleep Mode or Idle Mode is initialised by a HALT in-

struction and results in the following.

· The system clock will be turned off.

· The WDT function will be disabled if the WDT clock

source is the instruction clock.

· The WDT function will be disabled if the WDT clock

source is the 32768Hz oscillator in the Idle mode.

· The WDT will still function if the WDT clock source is

the WDT internal oscillator.

· If the WDT function is still enabled, the WDT counter

and WDT prescaler will be cleared and resume count-

ing.

· The contents of the on chip Data Memory and regis-

ters remain unchanged.

· All the I/O ports maintain their original status.

· The PDF flag is set and the TO flag is cleared by hard-

ware.

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