HT95R34 datasheet(19/59 Pages) HOLTEK

19 / 59 page

HT95R34

Rev. 1.10

February 18, 2009

Timer/Event Counters

The provision of timers form an important part of any

microcontroller, giving the designer a means of carrying

out time related functions. The device contains two

count-up timers of 16-bit capacity. As each timer has

three different operating modes, they can be configured

to operate as a general timer, an external event counter

or as a pulse width measurement device.

There are two types of registers related to the

Timer/Event Counters. The first are the registers that

contains the actual value of the Timer/Event Counter

and into which an initial value can be preloaded, and are

known as TMR0L/TMR0H and TMR1L/TMR1H. Read-

ing these register pairs retrieves the contents of the

Timer/Event Counters. The second type of associated

the timer options and determines how the Timer/Event

Counters are to be used, and have the name TMR0C

and TMT1C. The device can have the timer clock con-

figured to come from the internal clock source or from an

external timer pin.

Configuring the Timer/Event Counter Input Clock

Source

For Timer/Event Counter 0, the internal timer clock

source can originate from either the system clock/4 or

from an external clock source. For Timer/Event Counter

1, the internal timer clock source can originate from the

32768Hz or from an external clock source.

An external clock source is used when the timer is in the

event counting mode, the clock source being provided

on the external timer pins TMR0 or TMR1. Depending

upon the condition of the T0E or T01 bit, each high to

low, or low to high transition on the external timer pin will

increment the counter by one.

Timer Registers

- TMR0L/TMR0H, TMR1L/TMR1H

The timer registers are special function register pairs lo-

cated in the Special Purpose Data Memory and is the

place where the 16-bit actual timer value is stored.

These register pairs are known as TMR0L/TMR0H and

TMR1L/TMR1H. The value in the timer register pair in-

creases by one each time an internal clock pulse is re-

ceived or an external transition occurs on the external

timer pin. The timer will count from the initial value

loaded by the preload register to the full count of FFFFH

at which point the timer overflows and an internal inter-

rupt signal is generated. The timer value will then be re-

set with the initial preload register value and continue

counting.

To achieve a maximum full range count of FFFFH the

preload register must first be cleared to all zeros. It

should be noted that after power-on, the preload register

will be in an unknown condition. Note that if the

Timer/Event Counter is switched off and data is written

to its preload register, this data will be immediately writ-

ten into the actual timer register. However, if the

Timer/Event Counter is enabled and counting, any new

data written into the preload data register during this pe-

riod will remain in the preload register and will only be

written into the timer register the next time an overflow

occurs.

Reading from and writing to these registers is carried

out in a specific way. It must be noted that when using in-

structions to preload data into the low byte register,

namely TMR0L or TMR1L, the data will only be placed in

a low byte buffer and not directly into the low byte regis-

ter. The actual transfer of the data into the low byte reg-

ister is only carried out when a write to its associated

high byte register, namely TMR0H or TMR1H, is exe-

cuted. Also, using instructions to preload data into the

high byte timer register will result in the data being di-

rectly written to the high byte register. At the same time

the data in the low byte buffer will be transferred into its

associated low byte register. For this reason, when

preloading data into the 16-bit timer registers, the low

byte should be written first. It must also be noted that to

read the contents of the low byte register, a read to the

high byte register must first be executed to latch the con-

tents of the low byte buffer from its associated low byte

can be read in the normal way. Note that reading the low

byte timer register directly will only result in reading the

previously latched contents of the low byte buffer and

not the actual contents of the low byte timer register.

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