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HT95R34 датащи(PDF) 28 Page - Holtek Semiconductor Inc

номер детали HT95R34
подробное описание детали  I/O Type Phone 8-bit MCU with DTMF Receiver
PDF  59 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT95R34 датащи(HTML) 28 Page - Holtek Semiconductor Inc

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HT95R34
Rev. 1.10
28
February 18, 2009
other registers are preset to known conditions. All the
I/O port and port control registers will power up in a
high condition ensuring that all pins will be first set to
inputs.
Although the microcontroller has an internal RC reset
function, if the VDD power supply rise time is not fast
enough or does not stabilise quickly at power-on, the
internal reset function may be incapable of providing
proper reset operation. For this reason it is recom-
mended that an external RC network is connected to
the RES pin, whose additional time delay will ensure
that the RES pin remains low for an extended period
to allow the power supply to stabilise. During this time
delay, normal operation of the microcontroller will be
inhibited. After the RES line reaches a certain voltage
value, the reset delay time tRSTD is invoked to provide
an extra delay time after which the microcontroller will
begin normal operation. The abbreviation SST in the
figures stands for System Start-up Timer.
For most applications a resistor connected between
VDD and the RES pin and a capacitor connected be-
tween VSS and the RES pin will provide a suitable ex-
ternal reset circuit. Any wiring connected to the RES
pin should be kept as short as possible to minimise
any stray noise interference.
For applications that operate within an environment
where more noise is present the Enhanced Reset Cir-
cuit shown is recommended.
More information regarding external reset circuits is
located in Application Note HA0075E on the Holtek
website.
· RES Pin Reset
This type of reset occurs when the microcontroller is
already running and the RES pin is forcefully pulled
low by external hardware such as an external switch.
In this case as in the case of other reset, the Program
Counter will reset to zero and program execution initi-
ated from this point.
· Low Voltage Reset
- LVR
The microcontroller contains a low voltage reset cir-
cuit in order to monitor the supply voltage of the de-
vice. The LVR function is selected via a configuration
option. If the supply voltage of the device drops to
within a range of 0.9V~VLVR such as might occur when
changing the battery, the LVR will automatically reset
the device internally. For a valid LVR signal, a low sup-
ply voltage, i.e., a voltage in the range between
0.9V~VLVR must exist for a time greater than that spec-
ified by tLVR in the A.C. characteristics. If the low sup-
ply voltage state does not exceed this value, the LVR
will ignore the low supply voltage and will not perform
a reset function. The actual VLVR value can be se-
lected via configuration options.
· Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal opera-
tion is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to
²1².
· Watchdog Time-out Reset during Power Down
The Watchdog time-out Reset during Power Down is
a little different from other kinds of reset. Most of the
conditions remain unchanged except that the Pro-
gram Counter and the Stack Pointer will be cleared to
²0² and the TO flag will be set to ²1². Refer to the A.C.
Characteristics for tSST details.
R E S
V D D
S S T T i m e - o u t
I n t e r n a l R e s e t
0 . 9 V D D
t R S T D
Power-On Reset Timing Chart
R E S
0 . 1 m F
1 0 0 k W
V D D
V S S
0 . 0 1 m F
1 0 k W
Enhanced Reset Circuit
R E S
V D D
V S S
0 . 1 m F
1 0 0 k W
Basic Reset Circuit
R E S
S S T T i m e - o u t
I n t e r n a l R e s e t
0 . 9 V D D
0 . 4 V D D
t R S T D
RES Reset Timing Chart
L V R
S S T T i m e - o u t
I n t e r n a l R e s e t
t R S T D
Low Voltage Reset Timing Chart
W D T T i m e - o u t
S S T T i m e - o u t
I n t e r n a l R e s e t
t R S T D
WDT Time-out Reset during Normal Operation
Timing Chart
W D T T i m e - o u t
S S T T i m e - o u t
t S S T
WDT Time-out Reset during Power Down
Timing Chart



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