HT95R34 datasheet(20/59 Pages) HOLTEK

20 / 59 page

HT95R34

Rev. 1.10

February 18, 2009

Timer Control Registers

- TMR0C, TMR1C

The flexible features of the Holtek microcontroller

Timer/Event Counters enable them to operate in three

different modes, the options of which are determined by

the contents of their control register, which has the

name TMR0C/TMR1C. It is the Timer Control Register

together with its corresponding timer register pair that

control the full operation of each Timer/Event Counter.

Before the Timer/Event Counter can be used, it is es-

sential that the Timer Control Register is fully pro-

grammed with the right data to ensure its correct

operation, a process that is normally carried out during

program initialisation.

To choose which of the three modes the Timer/Event

Counter is to operate in, either in the timer mode, the

event counting mode or the pulse width measurement

mode, bits 7 and 6 of the Timer Control Register, which

are known as the bit pair T0M1/T0M0 and T1M1/T1M0,

must be set to the required logic levels. The Timer/Event

Counter on/off bit, which is bit 4 of the Timer Control

basic on/off control of the Timer/Event Counter. Setting

the bit high allows the Timer/Event Counter to run, clear-

ing the bit stops it running. If the Timer/Event Counter is

in the event count or pulse width measurement mode,

the active transition edge level type is selected by the

logic level of bit 3 of the Timer Control Register which is

known as T0E and T1E.

1 6 - b i t

P r e l o a d R e g i s t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r / E v e n t C o u n t e r

T M R 0

T 0 E

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T 0 O N

f S Y S / 4

T 0 M 1

T 0 M 0

16-bit Timer/Event Counter 0 Structure

1 6 - b i t

P r e l o a d R e g i s t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r / E v e n t C o u n t e r

T M R 1

T 1 E

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T 1 O N

3 2 7 6 8 H z

T 1 M 1

T 1 M 0

16-bit Timer/Event Counter 1 Structure

T M R 0 C R e g i s t e r

N o t i m p l e m e n t e d , r e a d a s " 0 "

b 7

E v e n t C o u n t e r A c t i v e E d g e S e l e c t

1 : c o u n t o n f a l l i n g e d g e

0 : c o u n t o n r i s i n g e d g e

T 0 E

T 0 O N

T 0 M 0

T 0 M 1

b 0

T i m e r / E v e n t C o u n t e r C o u n t i n g E n a b l e

1 : e n a b l e

0 : d i s a b l e

O p e r a t i n g M o d e S e l e c t

T 0 M 1

T 0 M 0

n o m o d e a v a i l a b l e

e v e n t c o u n t e r m o d e

t i m e r m o d e

p u l s e w i d t h m e a s u r e m e n t m o d e

P u l s e W i d t h M e a s u r e m e n t A c t i v e E d g e S e l e c t

1 : s t a r t c o u n t i n g o n r i s i n g e d g e , s t o p o n f a l l i n g e d g e

0 : s t a r t c o u n t i n g o n f a l l i n g e d g e , s t o p o n r i s i n g e d g e

N o t i m p l e m e n t e d , r e a d a s " 0 "

Timer/Event Counter 0 Control Register

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