SC16IS752IPW datasheet(57/59 Pages) NXP

57 / 59 page

SC16IS752_SC16IS762_7

Product data sheet

Rev. 07 — 19 May 2008

57 of 59

NXP Semiconductors

SC16IS752/SC16IS762

Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

19. Revision history

Table 43.

Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

SC16IS752_SC16IS762_7

20080519

Product data sheet

SC16IS752_SC16IS762_6

Modiﬁcations:

• Table 1 “Ordering information”: HVQFN32 package version changed from “SOT617-3” to

“SOT617-1”

• Figure 3 “Pin conﬁguration for HVQFN32”: adjusted size of exposed center pad

• Figure 20 “SPI operation”: updated; added Figure note [1] and Figure note [2]

• Table 37 “I2C-bus timing speciﬁcations[1]”:

– added speciﬁcation tw(rst)

– updated Table note [1]

• Figure 21 “SCL delay after reset” updated; added timing tw(rst)

• Table 39 “SPI-bus timing speciﬁcations”:

– added speciﬁcation tw(rst)

– tCSH(min) changed from “20 ns” to “5 ns” (for both 2.5 V and 3.3 V VDD voltages)

• Figure 30 “Detailed SPI-bus timing” updated; adjusted timing tCSH

• Figure 38: changed package outline from “SOT617-3” to “SOT617-1”

• updated SMD package soldering information

SC16IS752_SC16IS762_6

20061219

Product data sheet

SC16IS752_SC16IS762_5

20061128

Product data sheet

SC16IS752_SC16IS762_4

20061013

Product data sheet

SC16IS752_SC16IS762_3

20060707

Product data sheet

SC16IS752_SC16IS762_2

20060330

Product data sheet

SC16IS752_SC16IS762_1

(9397 750 14333)

20060104

Product data sheet

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