H838532H datasheet(261/508 Pages) RENESAS

261 / 508 page

Section 9 Timers

Rev. 1.00 May 30, 2008 Page 241 of 484

REJ09B0436-0100

9.4.5

Application Notes

The following types of contention and operation can occur when timer F is used.

(1) 16-bit Timer Mode

In toggle output, TMOFH pin output is toggled when all 16 bits match and a compare match

signal is generated. If a TCRF write by a MOV instruction and generation of the compare match

signal occur simultaneously, TOLH data is output to the TMOFH pin as a result of the TCRF

write. TMOFL pin output is unstable in 16-bit mode, and should not be used; the TMOFL pin

should be used as a port pin.

If an OCRFL write and compare match signal generation occur simultaneously, the compare

match signal is invalid. However, if the written data and the counter value match, a compare

match signal will be generated at that point. As the compare match signal is output in

synchronization with the TCFL clock, a compare match will not result in compare match signal

generation if the clock is stopped.

Compare match flag CMFH is set when all 16 bits match and a compare match signal is generated.

Compare match flag CMFL is set if the setting conditions for the lower 8 bits are satisfied.

When TCF overflows, OVFH is set. OVFL is set if the setting conditions are satisfied when the

lower 8 bits overflow. If a TCFL write and overflow signal output occur simultaneously, the

overflow signal is not output.

(2) 8-bit Timer Mode

a. TCFH, OCRFH

In toggle output, TMOFH pin output is toggled when a compare match occurs. If a TCRF write

by a MOV instruction and generation of the compare match signal occur simultaneously,

TOLH data is output to the TMOFH pin as a result of the TCRF write.

If an OCRFH write and compare match signal generation occur simultaneously, the compare

match signal is invalid. However, if the written data and the counter value match, a compare

match signal will be generated at that point. The compare match signal is output in

synchronization with the TCFH clock.

If a TCFH write and overflow signal output occur simultaneously, the overflow signal is not

output.

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