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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H838532H датащи(PDF) 253 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 253 Page - Renesas Technology Corp |
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253 / 508 page  Section 9 Timers Rev. 1.00 May 30, 2008 Page 233 of 484 REJ09B0436-0100 Bit 4: Counter clear H (CCLRH) In 16-bit mode, bit 4 selects whether TCF is cleared when TCF and OCRF match. In 8-bit mode, bit 4 selects whether TCFH is cleared when TCFH and OCRFH match. Bit 4 CCLRH Description 0 16-bit mode: TCF clearing by compare match is disabled 8-bit mode: TCFH clearing by compare match is disabled (initial value) 1 16-bit mode: TCF clearing by compare match is enabled 8-bit mode: TCFH clearing by compare match is enabled Bit 3: Timer overflow flag L (OVFL) Bit 3 is a status flag indicating that TCFL has overflowed from H'FF to H'00. This flag is set by hardware and cleared by software. It cannot be set by software. Bit 3 OVFL Description 0 Clearing condition: (initial value) After reading OVFL = 1, cleared by writing 0 to OVFL 1 Setting condition: Set when TCFL overflows from H’FF to H’00 Bit 2: Compare match flag L (CMFL) Bit 2 is a status flag indicating that TCFL has matched OCRFL. This flag is set by hardware and cleared by software. It cannot be set by software. Bit 2 CMFL Description 0 Clearing condition: (initial value) After reading CMFL = 1, cleared by writing 0 to CMFL 1 Setting condition: Set when the TCFL value matches the OCRFL value |
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