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H838532H датащи(PDF) 189 Page - Renesas Technology Corp |
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H838532H датащи(HTML) 189 Page - Renesas Technology Corp |
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189 / 508 page ![]() Section 8 I/O Ports Rev. 1.00 May 30, 2008 Page 169 of 484 REJ09B0436-0100 8.3 Port 3 8.3.1 Overview Port 3 is a 8-bit I/O port, configured as shown in figure 8.2. In the flash memory version, the on-chip pull-up MOS for pin P3 2 is on during the reset period. It turns off and normal operation resumes after the reset is cleared. This should be considered when making connections to external circuitry. Note that in the mask ROM version P3 2 continues to operate normally. P3 /AEVL P3 /AEVH P3 /TXD 7 6 5 Port 3 31 P3 /RXD P3 /SCK P3 4 3 2 31 31 P3 /UD/EXCL P3 /PWM 1 0 Figure 8.2 Port 3 Pin Configuration 8.3.2 Register Configuration and Description Table 8.5 shows the port 3 register configuration. Table 8.5 Port 3 Registers Name Abbr. R/W Initial Value Address Port data register 3 PDR3 R/W H'00 H'FFD6 Port control register 3 PCR3 W H'00 H'FFE6 Port pull-up control register 3 PUCR3 R/W H'00 H'FFE1 Port mode register 2 PMR2 R/W H'58 H'FFC9 Port mode register 3 PMR3 R/W H'04 H'FFCA |
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