APEX20KC datasheet(41/90 Pages) ALTERA

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APEX20KC датащи(PDF) 41 Page - Altera Corporation

41 / 90 page

Altera Corporation

APEX 20KC Programmable Logic Device Data Sheet

Notes to Figure 25:

(1)

This programmable delay has four settings: off and three levels of delay.

(2)

The output enable and input registers are LE registers in the LAB adjacent to the bidirectional pin.

Each IOE drives a row, column, MegaLAB, or local interconnect when

used as an input or bidirectional pin. A row IOE can drive a local,

MegaLAB, row, and column interconnect; a column IOE can drive the

column interconnect. Figure 26 shows how a row IOE connects to the

interconnect.

Figure 26. Row IOE Connection to the Interconnect

Row Interconnect

MegaLAB Interconnect

Any LE can drive a

pin through the row,

column, and MegaLAB

interconnect.

An LE can drive a pin through the

local interconnect for faster

clock-to-output times.

IOE

Each IOE can drive local,

MegaLAB, row, and column

interconnect. Each IOE data

and OE signal is driven by

the local interconnect.

LAB

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