APEX20KC datasheet(56/90 Pages) ALTERA

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Altera Corporation

APEX 20KC Programmable Logic Device Data Sheet

Notes to Tables 17 through 20:

(1)

See the Operating Requirements for Altera Devices Data Sheet.

(2)

Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 4.6 V for input

currents less than 100 mA and time periods shorter than 20 ns.

(3)

Numbers in parentheses are for industrial-temperature-range devices.

(4)

Maximum VCC rise time is 100 ms, and VCC must rise monotonically.

(5)

All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before VCCINT and VCCIO are

powered.

(6)

Typical values are for TA = 25° C, VCCINT = 1.8 V, and VCCIO = 1.8 V, 2.5 V or 3.3 V.

(7)

These values are specified under the APEX 20KC device recommended operating conditions, shown in Table 18 on

page 55.

(8)

This value is specified for normal device operation. The value may vary during power-up.

(9)

Pin pull-up resistance values will be lower if an external source drives the pin higher than VCCIO.

(10) Capacitance is sample-tested only.

Tables 21 through 35 list the DC operating specifications for the supported

I/O standards. These tables list minimal specifications only; APEX 20KC

devices may exceed these specifications.

Table 20. APEX 20KC Device Capacitance

Note (10)

Symbol

Parameter

Conditions

Min

Max

Unit

CIN

Input capacitance

VIN = 0 V, f = 1.0 MHz

CINCLK Input capacitance on

dedicated clock pin

VIN = 0 V, f = 1.0 MHz

COUT

Output capacitance

VOUT = 0 V, f = 1.0 MHz

Table 21. LVTTL I/O Specifications

Symbol

Parameter

Conditions

Minimum

Maximum

Units

VCCIO

Output supply

voltage

3.0

3.6

VIH

High-level input

voltage

2.0

VCCIO + 0.3

VIL

Low-level input

voltage

–0.3

0.8

Input pin leakage

current

VIN = 0 V or 3.3 V

–10

µA

VOH

High-level output

voltage

IOH = –12 mA,

VCCIO = 3.0 V (1)

2.4

VOL

Low-level output

voltage

IOL = 12 mA,

VCCIO = 3.0 V (2)

0.4

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