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MSP430 датащи(PDF) 52 Page - Texas Instruments

номер детали MSP430
подробное описание детали  MSP430G2x33, MSP430G2x03 Mixed-Signal Microcontrollers
PDF  96 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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MSP430 датащи(HTML) 52 Page - Texas Instruments

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P1.4/SMCLK/UCB0STE/UCA0CLK/
VREF+/VEREF+/A4/TCK
Direction
0: Input
1: Output
To Module
SMCLK
PxOUT.y
DVSS
DVCC
1
TAx.y
TAxCLK
Bus
Keeper
EN
1
0
PxIN.y
EN
D
PxSEL.y
PxREN.y
1
0
PxDIR.y
1
0
PxSEL2.y
PxSEL.y
1
0
INCHx = y *
To ADC10 *
From/To ADC10 Ref+ *
PxSEL.y
1
3
2
1
0
PxSEL2.y
From JTAG
To JTAG
PxIRQ.y
PxIE.y
EN
Set
Q
Interrupt
Edge
Select
PxSEL.y
PxIES.y
PxIFG.y
ADC10AE0.y *
* Note: MSP430G2x33 devices only. MSP430G2x03 devices have no ADC10.
from Module
52
MSP430G2533, MSP430G2433, MSP430G2333, MSP430G2233
MSP430G2403, MSP430G2303, MSP430G2203
SLAS734G – APRIL 2011 – REVISED APRIL 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: MSP430G2533 MSP430G2433 MSP430G2333 MSP430G2233 MSP430G2403 MSP430G2303
MSP430G2203
Detailed Description
Copyright © 2011–2016, Texas Instruments Incorporated
6.10.3 Port P1 Pin Diagram: P1.4, Input/Output With Schmitt Trigger
Figure 6-8 shows the port diagram. Table 6-18 summarizes the selection of the pin functions.
Figure 6-8. Port P1 (P1.4) Diagram



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