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MSP430 датащи(PDF) 44 Page - Texas Instruments |
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MSP430 датащи(HTML) 44 Page - Texas Instruments |
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44 / 96 page ![]() 44 MSP430G2533, MSP430G2433, MSP430G2333, MSP430G2233 MSP430G2403, MSP430G2303, MSP430G2203 SLAS734G – APRIL 2011 – REVISED APRIL 2016 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430G2533 MSP430G2433 MSP430G2333 MSP430G2233 MSP430G2403 MSP430G2303 MSP430G2203 Detailed Description Copyright © 2011–2016, Texas Instruments Incorporated 6.9.5 WDT+ Watchdog Timer The primary function of the watchdog timer (WDT+) module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be disabled or configured as an interval timer and can generate interrupts at selected time intervals. 6.9.6 Timer_A3 (TA0, TA1) Timer0_A3 and Timer1_A3 are 16-bit timers/counters with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing (see Table 6-12 and Table 6-13). Timer_A3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Table 6-12. Timer0_A3 Signal Connections INPUT PIN NUMBER DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK MODULE OUTPUT SIGNAL OUTPUT PIN NUMBER PW20, N20 PW28 RHB32 PW20, N20 PW28 RHB32 P1.0-2 P1.0-2 P1.0-31 TACLK TACLK Timer NA ACLK ACLK SMCLK SMCLK PinOsc PinOsc PinOsc TACLK INCLK P1.1-3 P1.1-3 P1.1-1 TA0.0 CCI0A CCR0 TA0 P1.1-3 P1.1-3 P1.1-1 ACLK CCI0B P1.5-7 P1.5-7 P1.5-5 VSS GND – P3.4-15 P3.4-14 VCC VCC P1.2-4 P1.2-4 P1.2-2 TA0.1 CCI1A CCR1 TA1 P1.2-4 P1.2-4 P1.2-2 CAOUT CCI1B P1.6-14 P1.6-22 P1.6-21 VSS GND P2.6-19 P2.6-27 P2.6-26 VCC VCC – P3.5-19 P3.5-18 – P3.0-9 P3.0-7 TA0.2 CCI2A CCR2 TA2 – P3.0-9 P3.0-7 PinOsc PinOsc PinOsc TA0.2 CCI2B – P3.6-20 P3.6-19 VSS GND VCC VCC |
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