MSP430 datasheet(2/96 Pages) TI2

2 / 96 page

Clock

System

Brownout

Protection

RST/NMI

DVCC

DVSS

MCLK

Watchdog

WDT+

15-Bit

Timer0_A3

3 CC

registers

16-MHz

CPU

including

16 registers

Emulation

2BP

JTAG

interface

SMCLK

ACLK

Port P1

8 I/Os,

interrupt

capability,

pullup or

pulldown

resistors

P1.x

P2.x

Port P2

8 I/Os,

interrupt

capability,

pullup or

pulldown

resistors

Spy-Bi-

Wire

Timer1_A3

3 CC

registers

XIN XOUT

Port P3

8 I/Os,

pullup or

pulldown

resistors

P3.x

RAM

512B

256B

Flash

16KB

8KB

4KB

2KB

USCI A0

UART,

LIN, IrDA,

SPI

USCI B0

SPI, I C

ADC

10 bit,

8 channel,

autoscan,

1-channel

DMA

MDB

MAB

MSP430G2533, MSP430G2433, MSP430G2333, MSP430G2233

MSP430G2403, MSP430G2303, MSP430G2203

SLAS734G – APRIL 2011 – REVISED APRIL 2016

www.ti.com

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Product Folder Links: MSP430G2533 MSP430G2433 MSP430G2333 MSP430G2233 MSP430G2403 MSP430G2303

MSP430G2203

Device Overview

(1)

For the most current part, package, and ordering information, see the Package Option Addendum in

Section 8, or see the TI website at www.ti.com.

(2)

The sizes shown here are approximations. For the package dimensions with tolerances, see the

Mechanical Data in Section 8.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE(2)

MSP430G2533IRHB

VQFN (32)

5 mm × 5 mm

MSP430G2533IPW

TSSOP (28)

9.7 mm × 4.4 mm

TSSOP (20)

6.5 mm × 4.4 mm

MSP430G2533IN

PDIP (20)

24.33 mm × 6.35 mm

1.4

Functional Block Diagrams

Figure 1-1 shows the functional block diagram of the MSP430G2x33 MCUs.

NOTE: Port P3 is available on 28-pin and 32-pin devices only.

Figure 1-1. Functional Block Diagram, MSP430G2x33

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