IP100A LF
Preliminary Data Sheet
64/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.4.24 TxDMAUrgentThresh
Class............................. LAN I/O Registers, DMA
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x09
Default .......................... 0x04
Width ............................ 8 bits
When the number of used bytes in the transmit FIFO falls below the value in the TxDMAUrgentThresh,
the transmit DMA logic will make an urgent bus master request. An urgent transmit DMA request will
have priority over the receive DMA, unless it is also making an urgent request. A transmit DMA urgent
request is not subject to the TxDMABurstThresh constraint. The relaxation of the TxDMABurstThresh
constraint for this condition is because the transmit FIFO is close to under run, and burst efficiency is
sacrificed to avoid FIFO under run. TxDMAUrgentThresh represents data in the transmit FIFO in
multiples of 32 bytes.
BIT
BIT NAME
R/W
BIT DESCRIPTION
5..0
TxDMAUrgentThresh R/W
Transmit DMA Urgent Threshold. The minimum number of
32-byte words which must be occupied in the transmit FIFO to
avoid assertion of a transmit DMA Urgent Request.
7..6
Reserved
N/A
Reserved for future use.
11.4.25 TxReleaseThresh
Class............................. LAN I/O Registers, FIFO Control
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x5d
Default .......................... 0x08
Width ............................ 8 bits
TxReleaseThresh determines how much data of a frame must be transmitted before the transmit FIFO
space can be released for use by another frame. Once the number of bytes equal to the value in
TxReleaseThresh have been transmitted, that number of bytes are discarded from the transmit FIFO.
Thereafter, bytes are discarded as they are transmitted to the network. A value of 0xff in TxReleaseThresh
disables the release mechanism and transmit FIFO frame space is not released until the entire frame is
transmitted. The TxReleaseError bit in the TxStatus register indicates when a frame experiences a collision
after its release threshold has been crossed, preventing MAC from retry. When a release error occurs, the
transmitter is disabled, and the frame’s ID or sequence number is visible in TxStatus.
BIT
BIT NAME
R/W
BIT DESCRIPTION
7..0
TxReleaseThresh
R/W
Transmit Release Threshold. The number of 16 byte words which
must be transmitted before the space in the transmit FIFO
occupied by the transmitted data can be released. To avoid
excessive
release
errors
due
to
in-window
collisions,
TxReleaseThresh should be greater than or equal to 0x04.
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