
IP100A LF
Preliminary Data Sheet
61/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
BIT
BIT NAME
R/W
BIT DESCRIPTION
12..0
RxDMAFrameLen
R
Receive DMA Frame Length.RxDMAFrameLen is similar to the
RxDMAFrameLen bit of the RxFrameStatus field, except that
RxDMAFrameLen provides a real-time indication of the number of
bytes transferred during a receive DMA operation.
13
Reserved
N/A
Reserved for future use.
14
RxFrameError
R
See the RxFrameError bit of the RxFrameStatus field.
15
RxDMAComplete
R
See the RxDMAComplete bit of the RxFrameStatus field.
16
RxFIFOOverrun
R
See the RxFIFOOverrun bit of the RxFrameStatus field.
17
RxRuntFrame
R
See the RxRuntFrame bit of the RxFrameStatus field.
18
RxAlignmentError
R
See the RxAlignmentError bit of the RxFrameStatus field.
19
RxFCSError
R
See the RxFCSError bit of the RxFrameStatus field.
20
RxOversizedFrame R
See the RxOversizedFrame bit of the RxFrameStatus field.
22..21
Reserved
N/A
Reserved for future use.
23
DribbleBits
R
See the DribbleBits bit of the RxFrameStatus field.
24
RxDMAOverflow
R
See the RxDMAOverflow bit of the RxFrameStatus field.
31..25
Reserved
N/A
Reserved for future use.
11.4.19 RxDMAUrgentThresh
Class............................. LAN I/O Registers, DMA
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x15
Default .......................... 0x04
Width ............................ 8 bits
RxDMAUrgentThresh sets a threshold at which the receive DMA logic will make a urgent bus master
request. A urgent receive DMA request will have priority over all other requests on the IP100A LF. The
urgent bus request is made when the free space in the receive FIFO falls below the value in
RxDMAUrgentThresh. A receive DMA urgent request is not subject to the RxDMABurstThresh constraint.
When the receive FIFO is close to overrun, burst efficiency is sacrificed in favor of requesting the bus as
quickly as possible. The value in RxDMAUrgentThresh represents free space in the receive FIFO in
terms of 32-byte portions.
BIT
BIT NAME
R/W
BIT DESCRIPTION
4..0
RxDMAUrgentThresh R/W
Receive DMA Urgent Threshold. RxDMAUrgentThresh is the
minimum number of 32-byte words which must be available in the
receive FIFO to avoid a receive DMA urgent request.
7..5
Reserved
N/A
Reserved for future use.