IP100A LF
Preliminary Data Sheet
50/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
11.4.3 EepromCtrl
Class............................. LAN I/O Registers, External Interface Control
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x36
Default .......................... 0x0000
Width ............................ 16 bits
BIT
BIT NAME
R/W
BIT DESCRIPTION
5:0
EepromAddress
R/W
EEPROM Address. EepromAddress identify one of the 256,
sixteen-bit words to be the target for the ReadRegister,
WriteRegister or EraseRegister commands.
7:6
EepromCommand
R/W
Bits 7 and 6 are further defined to identify a sub-command based
on the value of EepromOpcode. The definition of bits 7 and 6 are
valid when the EepromOpcode in bits 9 and 8 equals 00.
BIT 7
BIT 6
SUB-COMMAND
0
0
WriteDisable
0
1
WriteAII
1
0
EraseAll
1
1
WriteEnable
9..8
EepromOpcode
R/W
EEPROM Operation Code. EepromOpcode specifies one of three
individual commands and a single group of four sub-commands.
If both bit 9 and bit 8 are logic zero, the Opcode function will be
based on the value in bit 6 and bit 7, otherwise bit 6 and bit 7 does
not have any affect to these 2 bits.
BIT 9
BIT 8
OPCODE COMMAND
0
0
Don’t Care
0
1
WriteRegister
1
0
ReadRegister
1
1
Don’t Care
Note, after every WriteRegister, EraseRegister opcode, or
WriteAll
or
EraseAll
subcommand,
the
IP100A
LFwill
automatically issue a WriteDisable command to the EEPROM.
Therefore, a WriteEnable command must be issued to the
EEPROM prior to every WriteRegister, EraseRegister opcode, or
WriteAll or EraseAll subcommand.
10..11
Reserved
Reserve for future use
12
93C46TypeSel
R/W
When the 93C46TypSel is logic 1, IP100A LF accesses the
93C46 EEPROM by normal address code.
And when this bit is set to logic 0, IP100A LF read/write the
93C46 EEPROM via special address code. This function is
designed for special usage only.
13
EepromSel
RO
EEPROM Select. If this bit is logic 0, it means that IP100A LF is
connected to 93C46 series EEPROM.
14
Reserved
RO
Read back as 1.
15
EepromBusy
R
EEPROM Busy. EepromBusy is a logic 1 during the execution of
EEPROM commands. Further commands should not be issued to
EepromCtrl nor should data be read from Eeprom-Data while
EepromBusy is a logic 1.
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