IP100A LF
Preliminary Data Sheet
37/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
BIT
BIT NAME
BIT DESCRIPTION
14
RxFrameError
Receive Frame Error. RxFrameError indicates that an error occurred
during receipt of the frame. The host system should examine
RxFIFOOverrun, RxRuntFrame, RxAlignmentError, RxFCSError, and
RxOversizedFrame to determine the type of error(s). RxFrameError is
undefined until RxDMAComplete is a logic 1.
15
RxDMAComplete
Receive DMA Complete. RxDMAComplete indicates the frame transfer
from the IP100A LF to the host system is complete.
16
RxFIFOOverrun
Receive FIFO Overrun. RxFIFOOverrun indicates the data was not
removed from the receive FIFO fast enough to keep up with the rate data
was entering the receive FIFO from the media. Bytes may be missing
from the frame at one or more unpredictable locations within the frame.
RxFIFOOverrun is undefined until RxDMAComplete is a logic 1.
17
RxRuntFrame
Received Runt Frame. RxRuntFrame indicates the received frame was a
runt (less than 60 bytes in length, measured from the DA field to the end
of the Data field). RxRuntFrame is undefined until RxDMAComplete is a
logic 1.
18
RxAlignmentError
Receive Alignment Error. RxRuntFrame indicates that the received frame
had
an
alignment
error.
RxAlignmentError
is
undefined
until
RxDMAComplete is a logic 1.
19
RxFCSError
Receive Frame Check Sequence Error. RxFCSError indicates a FCS
checksum error on the frame data. RxFCSError is undefined until
RxDMAComplete is a logic 1
20
RxOversizedFrame Receive Oversized Frame. RxOversizedFrame indicates the frame size
was equal to or greater than the value set in the MaxFrameSize register.
RxOversizedFrame is undefined until RxDMAComplete is a logic 1.
22..21
Reserved
Reserved for future use.
23
DribbleBits
Dribble Bits. DribbleBits indicates that the frame had accompanying
dribble bits. DribbleBits is informational only, and does not indicate a
frame error.
24
RxDMAOverflow
Receive DMA Overflow. RxDMAOverflow indicates that the RFD did not
have sufficient buffer space to hold all of the frame data. For this
condition, the IP100A LF transfers as much data as possible and
discards the remainder of the frame.
27..25
Reserved
Reserved for future use.
28
ImpliedBufferEnable Implied Buffer Enable. ImpliedBufferEnable enables a special receive
DMA mode. If ImpliedBufferEnable is a logic 1 when the IP100A LF reads
the RFD, the IP100A LF will assume there is one receive buffer of length
1528 bytes, starting immediately after ReceiveFrameStatus at (RFD
address + 0x08).
The host system sets ImpliedBufferEnable when it prepares the RFD.
The IP100A LF tests ImpliedBufferEnable before receive DMA for a
frame begins at the same time it tests the RxDMAComplete bit. When the
IP100A LF updates RxFrameStatus field at the end of the receive DMA
operation (in order to set RxDMAComplete) the value written to
ImpliedBufferEnable is undefined. The host system cannot assume a
certain value is left in ImpliedBufferEnable after the RFD is used.
Therefore, the host system must write the desired value to
ImpliedBufferEnable every time after releasing a RFD to the IP100A LF.
31..29
Reserved
Reserved for future use.
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