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IP100ALF датащи(PDF) 15 Page - List of Unclassifed Manufacturers

номер детали IP100ALF
подробное описание детали  Integrated 10/100 Ethernet MAC PHY
PDF  97 Pages
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производитель  ETC2 [List of Unclassifed Manufacturers]
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IP100ALF датащи(HTML) 15 Page - List of Unclassifed Manufacturers

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IP100A LF
Preliminary Data Sheet
15/97
March. 30, 2007
Copyright © 2004, IC Plus Corp.
IP100A LF-DS-R17
To prevent a TxFIFO under run condition the TxDMA logic forwards an urgent request to the arbiter,
regardless of the TxDMABurstThresh constraint, when the number of occupied bytes in the TxFIFO
drops below the value in TxDMAUrgentThresh register.
6.6
TxFIFO
The IP100A LF uses 2K bytes of transmit data buffer between the TxDMA Logic and Transmit MAC.
When the TxDMA logic determines there is enough space available in the TxFIFO, the TxDMA Logic will
move any pending frame data into the TxFIFO. The TxReleaseThresh register value determines the
amount of data which must be transmitted out of the TxFIFO before the FIFO memory space occupied by
that data can be released for use by another frame.
A TxReleaseError occurs when a frame experiences a collision after the TxFIFO release threshold has
been crossed. The IP100A LF will not be able to retransmit this frame from the TxFIFO and the complete
frame must be transferred from the host system memory to the TxFIFO again by TxDMA Logic.
6.7
RxDMA Logic
The IP100A LF supports a multi-frame, multi-fragment DMA scatter process. Descriptors representing
frames are built and linked in system memory by the host processor. The RxDMA Logic is responsible for
transferring the frame data from the RxFIFO to the host memory.
The RxDMA Logic monitors the number of bytes in the RxFIFO. After a number of bytes have been
received, the frame is “visible”. A frame is visible if:
• The frame being received is determined not to be a runt, OR
• The entire frame has been received
After a frame becomes visible, the RxDMA Logic will issue a request to the arbiter when the number of
bytes in the RxFIFO is greater than the value in the RxDMABurstThresh. To prevent receive overruns, a
RxDMA Urgent Request is made when the amount of free space in the RxFIFO falls below the value in
RxDMAUrgentThresh.
6.8
RxFIFO
The IP100A LF uses 2K bytes of receive data buffer between the Receive MAC and RxDMA Logic. The
values in RxDMABurstThresh determine how many bytes of a frame must be received into RxFIFO
before RxDMA Logic is allowed to begin data transfer.
6.9
EEPROM Interface
The external serial EEPROM is used for non-volatile storage of such information as the node address,
system ID, and default configuration settings. As part of initialization after system reset, the IP100A LF
reads from the EEPROM and places the data into certain host-accessible registers. IP100A LF is able to
read and write to 93LC46 series EEPROM. The correct connection is shown in section 17.2.



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