TMPR4937 datasheet(54/552 Pages) TOSHIBA

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Chapter 2 Configuration

2-2

The TX4937 has the following blocks.

(1) TX49/H3 Core: Consists of a CPU, System Control Coprocessor (CP0), Instruction cache, Data cache,

Floating-point Unit (FPU), write buffer (WBU), Debugging Support Unit (DSU), and a G-Bus I/F.

•

FPU:

An IEEE754-compliant single-precision or double-precision floating-point unit. Is

allocated as one coprocessor unit (CP1).

•

I-Cache: Instruction cache memory. 32 KB, 4-way set associative.

•

D-Cache: Data cache memory. 32 KB, 4-way set associative. You can select as a write policy

Write Back, Write Through No Write Allocate, or Write Through Write Allocate.

•

DSU:

Debugging Support Unit. This is an on-chip debugging module.

(2) EBUSC:

External Bus Controller. Controls 8-channel ROM, SRAM, I/O.

(3) DMAC0:

Direct Memory Access Controller. Has 4 channels. Can transfer internal I/O device,

external I/O device, mutual memory data.

(4) DMAC1:

Direct Memory Access Controller. Has 4 channels. Can transfer internal I/O device, mutual

memory data.

(5) SDRAMC: SDRAM Controller. Controls 4-channel SDRAM. Supports 64-bit data bus, 133 MHz

operation, ECC/parity.

(6) PCIC:

PCI Controller. Complies with PCI Local Bus Specification Revision 2.2. Supports 66 MHz

operation. Has an on-chip dedicated DMA Controller (PDMAC).

(7) SIO:

Serial I/O. This is a 2-channel asynchronous serial I/F.

(8) TMR:

Timer/counter. This is a 3-channel timer/counter.

(9) PIO:

Parallel I/O. Has an 8-bit dedicated port and an 8-bit shared port.

(10) ACLC:

AC-link Controller. Is compliant to Audio CODEC '97 Revision 2.1 (AC'97).

(11) IRC:

Interrupt Controller.

(12) EBIF:

External Bus Interface. Connects 20-bit External Address Bus or 64-bit External Data Bus

to SDRAMC or EBUSC.

(13) CG:

Clock Generator. Has a built-in PLL and provides a clock to each TX4937 block.

(14) G-Bus:

TX4937 internal bus. This is a 64-bit, high-speed internal bus that is directly connected to

the TX49/H3 core.

(15) IM-Bus:

TX4937 internal bus. This is a 32-bit, slow-speed internal bus that is connected to the G-

Bus via IMB.

(16) MB:

G-Bus - IM-Bus Bridge

(17) TEST

This is the internal diagnostic module.

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