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TMPR4937 датащи(PDF) 51 Page - Toshiba Semiconductor |
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TMPR4937 датащи(HTML) 51 Page - Toshiba Semiconductor |
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51 / 552 page ![]() Chapter 1 Overview and Features 1-5 • Can select either the Edge or Level interrupt detection mode for each external interrupt • Has a built-in 16-bit read/write register as a flag register for interrupt requests. Can request interrupts to an external device or to the TX49/H3 core (IRC interrupt) (10) Extended EJTAGInterface The TX4937's Extended EJTAG (Extended Enhanced Joint Test Action Group) interface provides two functions: IEEE1149.1-compliant JTAG boundary scan testing and real-time debugging using the Debugging Support Unit (DSU) built into the TX49/H3 core. • IEEE 1149.1 JTAG Boundary Scan Can use execution control (invoke, break, step, register/memory access) or PC tracing as real-time debugging function that uses a dedicated emulation probe |
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