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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8280 датащи(PDF) 146 Page - Freescale Semiconductor, Inc |
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MPC8280 датащи(HTML) 146 Page - Freescale Semiconductor, Inc |
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146 / 1386 page  Memory Map MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 3-2 Freescale Semiconductor 3.1 Internal Memory Map Table 3-1 defines the internal memory map of the MPC8280. Table 3-1. Internal Memory Map Address (offset) Register R/W Size Reset Section/Page CPM Dual-Port RAM (Data) 0x00000– 0x03FFF Dual-port RAM (DPRAM1) R/W 16 Kbytes — 14.5/14-17 0x04000– 0x07FFF Reserved — 16 Kbytes —— 0x08000– 0x0BFFF Dual-port RAM (DPRAM2) R/W 16 Kbytes — 14.5/14-17 0x0C000– 0x0FFFF Reserved — 16 Kbytes —— General SIU 0x10000 SIU module configuration register (SIUMCR) R/W 32 bits see Figure 4-28 4.3.2.6/4-33 0x10004 System protection control register (SYPCR) R/W 32 bits 0xFFFF_FF07 4.3.2.8/4-37 0x10008 Reserved — 6 bytes — — 0x1000E Software service register (SWSR) W 16 bits undefined 4.3.2.9/4-38 0x10010– 0x10023 Reserved — 20 bytes — — 0x10024 Bus configuration register (BCR) R/W 32 bits reset configuration 4.3.2.1/4-26 0x10028 60x bus arbiter configuration register (PPC_ACR) R/W 8 bits see Figure 4-22 4.3.2.2/4-29 0x10029 Reserved — 24 bits — — 0x1002C 60x bus arbitration-level register high (first 8 clients) (PPC_ALRH) R/W 32 bits 0x0126_3457 4.3.2.3/4-30 0x10030 60x bus arbitration-level register low (next 8 clients) (PPC_ALRL) R/W 32 bits 0x89AB_CDEF 4.3.2.3/4-30 0x10034 Local arbiter configuration register (LCL_ACR) R/W 8 bits 0x02 4.3.2.4/4-31 0x10035 Reserved — 24 bits — — 0x10038 Local arbitration-level register (first 8 clients) (LCL_ALRH) R/W 32 bits 0x0126_3457 4.3.2.5/4-32 0x1003C Local arbitration-level register (next 8 clients) (LCL_ALRL) R/W 32 bits 0x89AB_ CDEF 4.3.2.3/4-30 0x10040 60x bus transfer error status control register 1 (TESCR1) R/W 32 bits 0x0000_0000 4.3.2.10/4-39 0x10044 60x bus transfer error status control register 2 (TESCR2) R/W 32 bits 0x0000_0000 4.3.2.11/4-41 |
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