MPC8280 datasheet(51/1386 Pages) FREESCALE

51 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

Figures

Figure

Number

Title

Page

Number

8-8

Single-Beat and Burst Data Transfers ................................................................................... 8-26

8-9

28-Bit Extended Transfer to 32-Bit Port Size ....................................................................... 8-27

8-10

Burst Transfer to 32-Bit Port Size......................................................................................... 8-28

8-11

Data Tenure Terminated by Assertion of TEA ..................................................................... 8-29

8-12

MEI Cache Coherency Protocol—State Diagram (WIM = 001) .......................................... 8-30

9-1

PCI Bridge in the MPC8280 ................................................................................................... 9-2

9-2

PCI Bridge Structure ............................................................................................................... 9-2

9-3

Single Beat Read Example.................................................................................................... 9-10

9-4

Burst Read Example.............................................................................................................. 9-10

9-5

Single Beat Write Example ................................................................................................... 9-11

9-6

Burst Write Example ............................................................................................................. 9-11

9-7

Target-Initiated Terminations ................................................................................................9-12

9-8

PCI Configuration Type 0 Translation

(Top = CONFIG_ADDR) (Bottom = PCI Address Lines) .............................................. 9-15

9-9

PCI Parity Operation ............................................................................................................. 9-18

9-10

PCI Arbitration Example ...................................................................................................... 9-20

9-11

Address Decode Flow Chart for 60x Bus Mastered Transactions ........................................ 9-21

9-12

Address Decode Flow Chart for PCI Mastered Transactions ............................................... 9-22

9-13

Address Decode Flow Chart for Embedded Utilities

(DMA, Message Unit) Mastered Transactions................................................................. 9-23

9-14

Address Map Example .......................................................................................................... 9-24

9-15

Inbound PCI Memory Address Translation .......................................................................... 9-25

9-16

Outbound PCI Memory Address Translation ....................................................................... 9-26

9-17

PCI Outbound Translation Address Registers (POTARx) .................................................... 9-30

9-18

PCI Outbound Base Address Registers (POBARx).............................................................. 9-31

9-19

PCI Outbound Comparison Mask Registers (POCMRx) ..................................................... 9-32

9-20

Discard Timer Control register (PTCR) ................................................................................ 9-33

9-21

General Purpose Control Register (GPCR) .......................................................................... 9-34

9-22

PCI General Control Register (PCI_GCR) ........................................................................... 9-35

9-23

Error Status Register (ESR) .................................................................................................. 9-36

9-24

Error Mask Register (EMR).................................................................................................. 9-37

9-25

Error Control Register (ECR) ............................................................................................... 9-38

9-26

PCI Error Address Capture Register (PCI_EACR) .............................................................. 9-39

9-27

PCI Error Data Capture Register (PCI_EDCR) .................................................................... 9-40

9-28

PCI Error Control Capture Register (PCI_ECCR) ............................................................... 9-41

9-29

PCI Inbound Translation Address Registers (PITARx) ........................................................ 9-42

9-30

PCI Inbound Base Address Registers (PIBARx) .................................................................. 9-43

9-31

PCI Inbound Comparison Mask Registers (PICMRx).......................................................... 9-44

9-32

PCI Bridge PCI Configuration Registers .............................................................................. 9-46

9-33

Vendor ID Register................................................................................................................ 9-47

9-34

Device ID Register................................................................................................................ 9-47

MPC8280 датащи(PDF) 51 Page - Freescale Semiconductor, Inc

MPC8280 датащи(HTML) 51 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL