LPC55S2X datasheet(44/132 Pages) NXP

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NXP Semiconductors

LPC55S2x/LPC552x

32-bit Arm Cortex®-M33 microcontroller

Symbol

59 pin

VFBGA

64 pin

HTQFP

98 pin

VFBGA

100 pin

HLQFP

Reset

state

[1]

Type Function

Description

VDD

F5;

E5;

D5;

8; 16;

43; 54

M1;

A5;

A9;

A13

15; 25;

44; 63;

69;75;

84; 95;

100

Single 1.8 V to 3.6 V power supply powers I/

Os.

VDD_PMU G6

Core supply. For applications with DCDC

converter, VDD_PMU and FB are tied at

PCB level.

VDDA

Analog supply voltage. At PCB level, has to

be tied to main supply (VBAT_PMU, VBAT_

DCDC)

VREFN

ADC negative reference voltage.

VREFP

ADC positive reference voltage.

VSS

D4;

D6;

F4;

exposed

pad

N1;

B5;

B9;

B13

exposed

pad

Ground.

VSS_

DCDC

N12,

M12

46, 47

Star ground connection is managed to PCB

ground plane.

VSS_PMU -

M11

Star ground connection is managed to PCB

ground plane.

VSSA

Analog ground.

XTAL32K_

J12

[11]

RTC oscillator output.

XTAL32K_

J13

[11]

RTC oscillator input.

XTAL32M_

[12]

Main oscillator output. For USB HS ISP

mode, 16 MHz crystal is required.

XTAL32M_

[12]

Main oscillator input. For USB HS ISP mode,

16 MHz crystal is required.

Table 3. Pin description...continued

[1]

PU = input mode, pull-up enabled (pull-up resistor pulls pin up towards VDD). PD = input mode, pull-down enabled (pull-down resistor pulls pin down

towards VSS). Z = high impedance; pull-up, pull-down, and input disabled. AI = analog input. I = input. O = output. I/O = input/output. Reset state reflects

the pin state at reset without boot code operation. For termination on unused pins, see Section 6.1.1"Termination of unused pins".

[2]

Pin providing standard digital I/O functions with configurable modes, configurable hysteresis, and analog input. When configured as an analog input, the

digital section of the pin is disabled.

[3]

Pad provides digital I/O functions with TTL levels and hysteresis; normal drive strength.

[4]

The JTAG functions TRST, TCK, TMS, TDI, and TDO are selected by hardware when the part is in boundary scan mode. The JTAG functions cannot be

used for debug mode.

[5]

True open-drain pin. I2C-bus pins compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode Plus. The pin

requires an external pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines. Open-drain

configuration applies to all functions on this pin. Includes a filter that can be selectively disabled by setting the FILTEROFF bit. The filter suppresses input

pulses smaller than about 3 ns in GPIO mode and smaller than about 3 ns in GPIO mode and smaller than 10 ns or 50 ns in I2C mode, depending on the

value of I2CFILTER field.

[6]

The corresponding VBUS must be connected to supply voltage when using the USB peripheral. USB0_VBUS is not 5 V tolerant pin and is tolerant up to

3.6 V only when the VDD is at operating level (minimum: 1.8 V). USB1_VBUS is 5 V tolerant pin regardless if the VDD supply is present or not.

[7]

Reset pad with glitch filter and hysteresis. Pulse width of spikes or glitches suppressed by input filter is from 3 ns to

20 ns (simulated value)

[8]

Transparent analog pad.

LPC55S2X_LPC552X

All information provided in this document is subject to legal disclaimers.

Data sheet

Rev. 2.3 — 29 August 2024

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