LPC55S2X datasheet(32/132 Pages) NXP

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NXP Semiconductors

LPC55S2x/LPC552x

32-bit Arm Cortex®-M33 microcontroller

Symbol

59 pin

VFBGA

64 pin

HTQFP

98 pin

VFBGA

100 pin

HLQFP

Reset

state

[1]

Type Function

Description

I/O 1

FC0_RTS_SCL_SSEL1

Flexcomm 0: USART request-to-send, I2C

clock, SPI slave select 1.

I/O 2

SD0_D[1

]

SD/MMC 0 data 1.

CTIMER2_MAT2

32-bit CTimer2 match output 2.

SCT0_GPI4

Pin input 4 to SCTimer/PWM.

I/O;

PIO1_8/ADC0_4

General-purpose digital input/output pin.

ADC single ended input channel 4A - CH4A.

Can optionally be paired with CH4B as the

positive differential input on ADC1 channel

I/O 1

FC0_CTS_SDA_SSEL0

Flexcomm 0: USART clear-to-send, I2C data

I/O, SPI Slave Select 0.

SD0_CLK

SD/MMC 0 card clock.

Reserved.

SCT0_OUT1

SCTimer/PWM output 1.

PIO1_8/

ADC0_4

[2]

I/O 5

FC4_SSEL2

Flexcomm 4: SPI slave select 2.

I/O;

PIO1_9/ADC0_12

General-purpose digital input/output pin.

ADC single ended input channel 4B - CH4B.

Can optionally be paired with CH4A as the

negative differential input on ADC1 channel

Reserved.

I/O 2

FC1_SCK

Flexcomm 1: USART, SPI, or I2S clock.

CTIMER_INP4

Capture input to CTIMER input multiplexers.

SCT0_OUT2

SCTimer/PWM output 2.

PIO1_9/

ADC0_12

[2]

I/O 5

FC4_CTS_SDA_SSEL0

Flexcomm 4: USART clear-to-send, I2C data

I/O, SPI Slave Select 0.

Table 3. Pin description...continued

LPC55S2X_LPC552X

All information provided in this document is subject to legal disclaimers.

Data sheet

Rev. 2.3 — 29 August 2024

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