LPC55S2X datasheet(43/132 Pages) NXP

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NXP Semiconductors

LPC55S2x/LPC552x

32-bit Arm Cortex®-M33 microcontroller

Symbol

59 pin

VFBGA

64 pin

HTQFP

98 pin

VFBGA

100 pin

HLQFP

Reset

state

[1]

Type Function

Description

General-purpose digital input/output pin.

I/O 1

MCLK

MCLK input or output for I2S.

SD1_CLK

SD/MMC 1 card clock.

CTIMER0_MAT2

32-bit CTimer0 match output 2.

SCT0_OUT6

SCTimer/PWM output 6.

Reserved.

PLU_INPUT0

PLU input 0.

Reserved.

Feedback node (regulated output) of DCDC

converter.

N11

DCDC converter power stage output.

RESETN

[7]

External reset input: A LOW on this pin

resets the device, causing I/O ports and

peripherals to take on their default states,

and the boot code to execute. Wakes up the

part from deep power-down mode.

USB0_3V3 -

USB0 analog 3.3 V supply.

USB0_DM -

[8][6]

I/O

USB0 bidirectional D- line.

USB0_DP -

[8][6]

I/O

USB0 bidirectional D+ line.

USB0_

VSS

USB0 analog 3.3 V ground.

USB1_DM J4

[8][6]

I/O

USB1 bidirectional D- line.

USB1_DP H4

[8][6]

I/O

USB1 bidirectional D+ line.

USB1_

VBUS

[8][6]

VBUS pin (power on USB cable).

USB1_3V3 G5

[9]

USB1 analog 3.3 V supply.

USB1_

VSS

22;26

33; 37

USB1 analog 3.3 V ground.

VBAT_

DCDC

N13

49, 50

[6]

Supply of DCDC output stage. DCDC core

supply (references and regulation stages).

VBAT_

PMU

M13

[10]

Analog supply.

Table 3. Pin description...continued

LPC55S2X_LPC552X

All information provided in this document is subject to legal disclaimers.

Data sheet

Rev. 2.3 — 29 August 2024

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