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LPC55S2X датащи(PDF) 26 Page - NXP Semiconductors

номер детали LPC55S2X
подробное описание детали  32-bit Arm Cortex®-M33 microcontroller
PDF  132 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC55S2X датащи(HTML) 26 Page - NXP Semiconductors

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NXP Semiconductors
LPC55S2x/LPC552x
32-bit Arm Cortex®-M33 microcontroller
Symbol
59 pin
VFBGA
64 pin
HTQFP
98 pin
VFBGA
100 pin
HLQFP
Reset
state
[1]
Type Function
#
Description
O
9
PLU_OUT0
PLU output 0.
I/O 10
SEC_PIO0_27
Secure GPIO pin.
I/O 0
PIO0_28
General-purpose digital input/output pin.
This pin can trigger a wake-up from deep
power-down mode.
WAKEUP pin can be configured as rising or
falling edge
I/O 1
FC0_SCK
Flexcomm 0: USART, SPI, or I2S clock.
I/O 2
SD1_CMD
SD/MMC 1 card command I/O.
I
3
CTIMER_INP11
Capture input to CTIMER input multiplexers.
O
4
SCT0_OUT7
SCTimer/PWM output 7.
5
R
Reserved.
6
R
Reserved.
I
7
USB0_OVERCURRENTN
USB0 bus overcurrent indicator (active low).
8
R
Reserved.
O
9
PLU_OUT1
PLU output 1.
PIO0_28/
WAKEUP
D7
44
F13
66
[3][6] Z
I/O 10
SEC_PIO0_28
Secure GPIO pin.
I/O 0
PIO0_29
General-purpose digital input/output pin.
Remark: In ISP mode, this pin is set to the
Flexcomm 0 USART RXD function.
I/O 1
FC0_RXD_SDA_MOSI_DATA
Flexcomm 0: USART receiver, I2C data I/O,
SPI master-out/slave-in data, I2S data I/O.
I/O 2
SD1_D[2]
SD/MMC 1 data 2.
PIO0_29
A4
59
H8
92
[3]
Z
O
3
CTIMER2_MAT3
32-bit CTimer2 match output 3.
Table 3. Pin description...continued
LPC55S2X_LPC552X
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Data sheet
Rev. 2.3 — 29 August 2024
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