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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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IMX7DCEC датащи(PDF) 114 Page - NXP Semiconductors |
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IMX7DCEC датащи(HTML) 114 Page - NXP Semiconductors |
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114 / 161 page  Electrical characteristics i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023 NXP Semiconductors 114 4.10.14 UART I/O configuration and timing parameters 4.10.14.1 UART RS-232 I/O configuration in different modes The i.MX 7Dual UART interfaces can serve both as DTE or DCE device. This can be configured by the DCEDTE control bit (default 0—DCE mode). Table 88 shows the UART I/O configuration based on the enabled mode. 4.10.14.2 UART RS-232 Serial mode timing This section describes the electrical information of the UART module in the RS-232 mode. SJ9 JTAG_TMS, JTAG_TDI data hold time 25 — ns SJ10 JTAG_TCK low to JTAG_TDO data valid — 44 ns SJ11 JTAG_TCK low to JTAG_TDO high impedance — 44 ns SJ12 JTAG_TRST_B assert time 100 — ns SJ13 JTAG_TRST_B set-up time to JTAG_TCK low 40 — ns 1 TDC = target frequency of SJC 2 VM = mid-point voltage Table 88. UART I/O configuration vs. mode Port DTE Mode DCE Mode Direction Description Direction Description UARTx_RTS_B Output UARTx_RTS_B from DTE to DCE Input UARTx_RTS_B from DTE to DCE UARTx_CTS_B Input UARTx_CTS_B from DCE to DTE Output UARTx_CTS_B from DCE to DTE UARTx_TX_ DATA Input Serial data from DCE to DTE Output Serial data from DCE to DTE UARTx_RX _DATA Output Serial data from DTE to DCE Input Serial data from DTE to DCE Table 87. JTAG timing(continued) ID Parameter1,2 All Frequencies Unit Min Max |
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