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IMX7DCEC датащи(PDF) 84 Page - NXP Semiconductors

номер детали IMX7DCEC
подробное описание детали  i.MX 7Dual Family of Applications Processors Datasheet
PDF  161 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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IMX7DCEC датащи(HTML) 84 Page - NXP Semiconductors

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Electrical characteristics
i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023
NXP Semiconductors
84
4.10.2
Ultra-high-speed SD/SDIO/MMC host interface (uSDHC) AC
timing
This section describes the electrical information of the uSDHC, which includes SD/eMMC4.3 (single data
rate) timing, eMMC4.4/4.41 (dual data rate) timing and SDR104/50(SD3.0) timing.
4.10.2.1 SD/eMMC4.3 (single data rate) AC timing
Figure 46 depicts the timing of SD/eMMC4.3, and Table 61 lists the SD/eMMC4.3 timing characteristics.
Figure 46. SD/eMMC4.3 Timing
Table 61. SD/eMMC4.3 interface timing specification
ID
Parameter
Symbols
Min
Max
Unit
Card Input Clock
SD1
Clock Frequency (Low Speed)
fPP1
0
400
kHz
Clock Frequency (SD/SDIO Full Speed/High Speed)
fPP2
0
25/50
MHz
Clock Frequency (MMC Full Speed/High Speed)
fPP3
0
20/52
MHz
Clock Frequency (Identification Mode)
fOD
100
400
kHz
SD2
Clock Low Time
tWL
7
—
ns
SD3
Clock High Time
tWH
7
—
ns
SD4
Clock Rise Time
tTLH
—
3
ns
SD5
Clock Fall Time
tTHL
—
3
ns
uSDHC Output/Card Inputs SD_CMD, SDx_DATAx (Reference to CLK)
SD6
uSDHC Output Delay
tOD
-6.6
3.6
ns
SD1
SD3
SD5
SD4
SD7
SDx_CLK
SD2
SD8
SD6
Output from uSDHC to card
Input from card to uSDHC
SDx_DATA[7:0]
SDx_DATA[7:0]



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